{"id":1550,"date":"2021-04-02T12:28:46","date_gmt":"2021-04-02T12:28:46","guid":{"rendered":"https:\/\/imperix.com\/doc\/?p=1550"},"modified":"2025-05-07T12:26:51","modified_gmt":"2025-05-07T12:26:51","slug":"fpga-based-spi-communication-ip","status":"publish","type":"post","link":"https:\/\/imperix.com\/doc\/implementation\/fpga-based-spi-communication-ip","title":{"rendered":"FPGA-based SPI communication IP for ADC"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_82_2 ez-toc-wrap-right-text counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-spi-communication-ip\/#Related-notes\" >Related notes<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-spi-communication-ip\/#Software-resources\" >Software resources<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-spi-communication-ip\/#FPGA-ADC-implementation\" >FPGA ADC implementation<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-spi-communication-ip\/#FPGA-ADC-testbench\" >FPGA ADC testbench<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-spi-communication-ip\/#Deployment-on-the-B-Board-PRO-FPGA\" >Deployment on the B-Board PRO FPGA<\/a><ul class='ez-toc-list-level-3' ><li class='ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-spi-communication-ip\/#Using-the-imperix-33V-USR-pins\" >Using the imperix 3.3V USR pins<\/a><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-spi-communication-ip\/#Experimental-results\" >Experimental results<\/a><\/li><\/ul><\/nav><\/div>\n\n<p>This technical note shows how an SPI communication link can be established between an FPGA and an external Analog-to-Digital Converter (ADC). The development setup will consist of an imperix <a href=\"https:\/\/imperix.com\/products\/control\/inverter-control-board\/\">B-Board PRO<\/a> evaluation kit and an LTC2314 demonstration circuit. The LTC2314 ADC driver will be developed using VHDL integrated into the user-programmable area (the <em>sandbox) <\/em>of the FPGA thanks to the <a href=\"https:\/\/imperix.com\/software\/fpga-programming\/\">FPGA customization feature<\/a> of the imperix controllers. Three of the 36 user-configurable 3.3V I\/Os of the B-Board will be used for the  SPI communication with the ADC.<\/p>\n\n\n\n<p>This note provides a VHDL implementation of the FPGA ADC driver. However, automated HDL code generation tools such as <a href=\"https:\/\/imperix.com\/doc\/help\/matlab-hdl-coder\">MATLAB HDL Coder<\/a> or <a href=\"https:\/\/imperix.com\/doc\/help\/xilinx-system-generator\">Xilinx System Generator<\/a> can be used to create FPGA peripherals as shown on the <a href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-pwm-modulator\">custom FPGA PWM<\/a> page.<\/p>\n\n\n\n<div class=\"wp-block-simple-alerts-for-gutenberg-alert-boxes sab-alert sab-alert-dark\" role=\"alert\">To find all FPGA-related notes, you can visit\u00a0<a href=\"https:\/\/imperix.com\/doc\/help\/fpga-development-on-imperix-controllers\">FPGA development homepage<\/a>.<\/div>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-related-notes\"><span class=\"ez-toc-section\" id=\"Related-notes\"><\/span>Related notes<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>Information on how to set up the toolchain for the FPGA programming is available on the <a href=\"https:\/\/imperix.com\/doc\/help\/vivado-design-suite-installation\">Vivado Design Suite<\/a> installation page.<\/p>\n\n\n\n<p>Quick-start information on how to use the <em>sandbox<\/em> is provided on the <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-fpga-control-development\">getting started with FPGA<\/a> page.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-software-resources\"><span class=\"ez-toc-section\" id=\"Software-resources\"><\/span>Software resources<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The FPGA ADC driver resources can be downloaded by clicking on the button below. It contains the VHDL driver <code>LT2314_driver.vhd<\/code>, its associated testbench <code>LT2314_tb.vhd<\/code>, as well as the C++ drivers implemented using the <a href=\"https:\/\/imperix.com\/software\/cpp-sdk\/\">C++ SDK<\/a>.<br><\/p>\n\n\n\n<div class=\"wp-block-file aligncenter\"><a href=\"https:\/\/cdn.imperix.com\/doc\/wp-content\/uploads\/2021\/04\/TN130_LTC2314_ADC_FPGA_driver.zip\" class=\"wp-block-file__button wp-element-button\" download>Click to download <strong>TN130_LTC2314_ADC_FPGA_driver.zip<\/strong><\/a><\/div>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-fpga-adc-implementation\"><span class=\"ez-toc-section\" id=\"FPGA-ADC-implementation\"><\/span>FPGA ADC implementation<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>This example implements a full-custom FPGA ADC SPI driver for the <a href=\"https:\/\/www.analog.com\/en\/products\/ltc2314-14.html\">LTC2314-14<\/a> serial sampling ADC with the following settings:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>It uses the LTC2314 SCK continuous mode (see next figure)<\/li>\n\n\n\n<li>The SCK frequency is configurable using a postscaler (<code>postscaler_in<\/code>)<\/li>\n\n\n\n<li>The conversion is started upon the assertion of <code>sampling_pulse<\/code><\/li>\n<\/ul>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"351\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-120-1024x351.png\" alt=\"LTC2314-14 Serial Interface Timing Diagram in SCK Continuous Mode\" class=\"wp-image-2113\" title=\"Technical notes &gt; TN130: FPGA-based SPI communication IP for A\/D converter &gt; LTC2314_timings.png\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-120-1024x351.png 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-120-300x103.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-120-768x263.png 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-120.png 1387w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><figcaption class=\"wp-element-caption\">LTC2314-14 Serial Interface Timing Diagram in SCK Continuous Mode (source LTC2314 datasheet)<\/figcaption><\/figure>\n\n\n<style>.kt-accordion-id1550_646bea-54 .kt-accordion-inner-wrap{column-gap:var(--global-kb-gap-md, 2rem);row-gap:1px;}.kt-accordion-id1550_646bea-54 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;border-top-left-radius:2px;border-top-right-radius:2px;border-bottom-right-radius:2px;border-bottom-left-radius:2px;background:#ffffff;padding-top:20px;padding-right:20px;padding-bottom:20px;padding-left:20px;}.kt-accordion-id1550_646bea-54 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid 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.kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id1550_646bea-54 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{color:var(--global-palette3, #1A202C);background:var(--global-palette9, #ffffff);border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}.kt-accordion-id1550_646bea-54:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id1550_646bea-54:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( 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.kt-blocks-accordion-icon-trigger:before{background:var(--global-palette9, #ffffff);}@media all and (max-width: 1024px){.kt-accordion-id1550_646bea-54 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}}@media all and (max-width: 1024px){.kt-accordion-id1550_646bea-54 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}}@media all and (max-width: 1024px){.kt-accordion-id1550_646bea-54 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id1550_646bea-54 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}}@media all and (max-width: 1024px){.kt-accordion-id1550_646bea-54 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id1550_646bea-54 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}@media all and (max-width: 767px){.kt-accordion-id1550_646bea-54 .kt-accordion-inner-wrap{display:block;}.kt-accordion-id1550_646bea-54 .kt-accordion-inner-wrap .kt-accordion-pane:not(:first-child){margin-top:1px;}.kt-accordion-id1550_646bea-54 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}.kt-accordion-id1550_646bea-54 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}.kt-accordion-id1550_646bea-54 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id1550_646bea-54 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id1550_646bea-54 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id1550_646bea-54 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}<\/style>\n<div class=\"wp-block-kadence-accordion alignnone\"><div class=\"kt-accordion-wrap kt-accordion-id1550_646bea-54 kt-accordion-has-2-panes kt-active-pane-0 kt-accordion-block kt-pane-header-alignment-left kt-accodion-icon-style-arrow kt-accodion-icon-side-left\" style=\"max-width:none\"><div class=\"kt-accordion-inner-wrap\" data-allow-multiple-open=\"false\" data-start-open=\"none\">\n<div class=\"wp-block-kadence-pane kt-accordion-pane kt-accordion-pane-1 kt-pane1550_b1ce40-bc\"><div class=\"kt-accordion-header-wrap\"><button class=\"kt-blocks-accordion-header kt-acccordion-button-label-show\"><span class=\"kt-blocks-accordion-title-wrap\"><span class=\"kt-blocks-accordion-title\"><strong>LTC2314 driver VHDL source<\/strong><\/span><\/span><span class=\"kt-blocks-accordion-icon-trigger\"><\/span><\/button><\/div><div class=\"kt-accordion-panel kt-accordion-panel-hidden\"><div class=\"kt-accordion-panel-inner\"><pre class=\"wp-block-code\" aria-describedby=\"shcb-language-1\" data-shcb-language-name=\"VHDL\" data-shcb-language-slug=\"vhdl\"><span><code class=\"hljs language-vhdl\"><span class=\"hljs-keyword\">library<\/span> IEEE;\n<span class=\"hljs-keyword\">use<\/span> IEEE.STD_LOGIC_1164.<span class=\"hljs-keyword\">ALL<\/span>;\n<span class=\"hljs-keyword\">use<\/span> IEEE.NUMERIC_STD.<span class=\"hljs-keyword\">ALL<\/span>;\n \n<span class=\"hljs-keyword\">entity<\/span> LT2314_driver <span class=\"hljs-keyword\">is<\/span>\n<span class=\"hljs-keyword\">port<\/span>(\n    <span class=\"hljs-comment\">-- CLOCKS:<\/span>\n    clk_250: <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>; <span class=\"hljs-comment\">-- 250 MHz clock<\/span>\n    sampling_pulse: <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>; <span class=\"hljs-comment\">-- sampling strobe<\/span>\n \n    <span class=\"hljs-comment\">-- CONFIGURATION:<\/span>\n    <span class=\"hljs-comment\">-- spi_sck = clk_250 \/ (postscaler_in*2)<\/span>\n    postscaler_in: <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>);\n \n    <span class=\"hljs-comment\">-- OUTPUT DATA:<\/span>\n    data_out: <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>) := (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>);\n \n    <span class=\"hljs-comment\">-- SPI SIGNALS:<\/span>\n    spi_sck: <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic<\/span>; <span class=\"hljs-comment\">-- communication clock<\/span>\n    spi_cs_n: <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic<\/span>; <span class=\"hljs-comment\">-- chip select strobe \/ sampling trigger<\/span>\n    spi_din: <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span> <span class=\"hljs-comment\">-- serial data in<\/span>\n);\n<span class=\"hljs-keyword\">end<\/span> LT2314_driver;\n \n<span class=\"hljs-keyword\">architecture<\/span> impl <span class=\"hljs-keyword\">of<\/span> LT2314_driver <span class=\"hljs-keyword\">is<\/span>\n \n    <span class=\"hljs-keyword\">TYPE<\/span> states <span class=\"hljs-keyword\">is<\/span> (ACQ,CONV);\n \n    <span class=\"hljs-keyword\">SIGNAL<\/span> state : states := ACQ; <span class=\"hljs-comment\">-- FSM state register<\/span>\n \n    <span class=\"hljs-comment\">-- Signal used as SPI communication clock<\/span>\n    <span class=\"hljs-comment\">-- spi_sck = postscaled_clk = clk_250 \/ (postscaler_in*2)<\/span>\n    <span class=\"hljs-keyword\">SIGNAL<\/span> postscaled_clk : <span class=\"hljs-built_in\">std_logic<\/span> := <span class=\"hljs-string\">'0'<\/span>;\n \n    <span class=\"hljs-comment\">-- Indicates a rising edge on postscaled_clk<\/span>\n    <span class=\"hljs-keyword\">SIGNAL<\/span> postscaled_clk_rising_pulse : <span class=\"hljs-built_in\">std_logic<\/span> := <span class=\"hljs-string\">'0'<\/span>;\n \n    <span class=\"hljs-comment\">-- Asserted when sampling_pulse = '1'<\/span>\n    <span class=\"hljs-comment\">-- Cleared when postscaled_clk_rising_pulse = '1'<\/span>\n    <span class=\"hljs-keyword\">SIGNAL<\/span> pulse_detected : <span class=\"hljs-built_in\">std_logic<\/span> := <span class=\"hljs-string\">'0'<\/span>;\n<span class=\"hljs-keyword\">begin<\/span>\n \n    spi_sck &lt;= postscaled_clk;\n    spi_cs_n &lt;= <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">when<\/span> state=ACQ <span class=\"hljs-keyword\">else<\/span> <span class=\"hljs-string\">'0'<\/span>;\n \n    <span class=\"hljs-comment\">-- Generate postscaled_clk and postscaled_clk_rising_pulse<\/span>\n    POSTSCALER: <span class=\"hljs-keyword\">process<\/span>(clk_250)\n        <span class=\"hljs-keyword\">variable<\/span> postscaler_cnt: <span class=\"hljs-built_in\">unsigned<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>):=(<span class=\"hljs-keyword\">others<\/span>=&gt;<span class=\"hljs-string\">'0'<\/span>);\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">if<\/span> rising_edge(clk_250) <span class=\"hljs-keyword\">then<\/span>\n            postscaled_clk_rising_pulse &lt;= <span class=\"hljs-string\">'0'<\/span>;\n \n            <span class=\"hljs-comment\">-- Toggle postscaled_clk<\/span>\n            <span class=\"hljs-comment\">-- Assert postscaled_clk_rising_pulse if rising edge<\/span>\n            <span class=\"hljs-keyword\">if<\/span> postscaler_cnt+<span class=\"hljs-number\">1<\/span> &gt;= <span class=\"hljs-built_in\">unsigned<\/span>(postscaler_in) <span class=\"hljs-keyword\">then<\/span>\n                <span class=\"hljs-keyword\">if<\/span> postscaled_clk = <span class=\"hljs-string\">'0'<\/span> <span class=\"hljs-keyword\">then<\/span>\n                    postscaled_clk_rising_pulse &lt;= <span class=\"hljs-string\">'1'<\/span>;\n                <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n                postscaler_cnt := (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>);\n                postscaled_clk &lt;= <span class=\"hljs-keyword\">not<\/span> postscaled_clk;\n            <span class=\"hljs-keyword\">else<\/span>\n                postscaler_cnt := postscaler_cnt + <span class=\"hljs-number\">1<\/span>;\n            <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n        <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> POSTSCALER;\n \n    <span class=\"hljs-comment\">-- Generate pulse_detected<\/span>\n    SAMPLING: <span class=\"hljs-keyword\">process<\/span>(clk_250)\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">if<\/span> rising_edge(clk_250) <span class=\"hljs-keyword\">then<\/span>\n            <span class=\"hljs-keyword\">if<\/span> sampling_pulse = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span>\n                pulse_detected &lt;= <span class=\"hljs-string\">'1'<\/span>;\n            <span class=\"hljs-keyword\">elsif<\/span> postscaled_clk_rising_pulse = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span>\n                pulse_detected &lt;= <span class=\"hljs-string\">'0'<\/span>;\n            <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n        <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> SAMPLING;\n \n    <span class=\"hljs-comment\">-- Finite State Machine<\/span>\n    <span class=\"hljs-comment\">-- Run at SPI clock speed (using postscaled_clk_rising_pulse=<\/span>\n    FSM : <span class=\"hljs-keyword\">process<\/span>(clk_250)\n        <span class=\"hljs-keyword\">variable<\/span> bit_cnt : <span class=\"hljs-built_in\">unsigned<\/span>(<span class=\"hljs-number\">4<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>) := (<span class=\"hljs-keyword\">others<\/span>=&gt;<span class=\"hljs-string\">'0'<\/span>); <span class=\"hljs-comment\">-- bit counter<\/span>\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">if<\/span> rising_edge(clk_250) <span class=\"hljs-keyword\">and<\/span> postscaled_clk_rising_pulse = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span>\n            <span class=\"hljs-keyword\">case<\/span> state <span class=\"hljs-keyword\">is<\/span>\n \n                <span class=\"hljs-keyword\">when<\/span> ACQ =&gt;\n                    bit_cnt := (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>);\n                    <span class=\"hljs-keyword\">if<\/span> pulse_detected = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span>\n                        state &lt;= CONV;\n                    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n \n                <span class=\"hljs-keyword\">when<\/span> CONV =&gt;\n                    bit_cnt := bit_cnt + <span class=\"hljs-number\">1<\/span>;\n                    <span class=\"hljs-keyword\">if<\/span> bit_cnt &gt;= <span class=\"hljs-number\">16<\/span> <span class=\"hljs-keyword\">then<\/span>\n                        state &lt;= ACQ;\n                    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n \n                <span class=\"hljs-keyword\">when<\/span> <span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-keyword\">null<\/span>;\n            <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">case<\/span>;\n        <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> FSM;\n \n    <span class=\"hljs-comment\">-- Sample spi_din on spi_sck rising edge during ACQUISITION phase<\/span>\n    SHIFT_REG: <span class=\"hljs-keyword\">process<\/span> (clk_250)\n        <span class=\"hljs-keyword\">variable<\/span> data_reg: <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>):=(<span class=\"hljs-keyword\">others<\/span>=&gt;<span class=\"hljs-string\">'0'<\/span>);\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">if<\/span> rising_edge(clk_250) <span class=\"hljs-keyword\">then<\/span>\n            <span class=\"hljs-keyword\">if<\/span> state = CONV <span class=\"hljs-keyword\">and<\/span> postscaled_clk_rising_pulse = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span>\n                data_reg := data_reg(<span class=\"hljs-number\">14<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>) &amp; spi_din;\n            <span class=\"hljs-keyword\">elsif<\/span> state = ACQ <span class=\"hljs-keyword\">then<\/span>\n                data_out &lt;= <span class=\"hljs-string\">\"0\"<\/span> &amp; data_reg(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">1<\/span>); <span class=\"hljs-comment\">-- re-align data<\/span>\n            <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n        <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> SHIFT_REG;\n<span class=\"hljs-keyword\">end<\/span> impl;<\/code><\/span><small class=\"shcb-language\" id=\"shcb-language-1\"><span class=\"shcb-language__label\">Code language:<\/span> <span class=\"shcb-language__name\">VHDL<\/span> <span class=\"shcb-language__paren\">(<\/span><span class=\"shcb-language__slug\">vhdl<\/span><span class=\"shcb-language__paren\">)<\/span><\/small><\/pre><\/div><\/div><\/div>\n<\/div><\/div><\/div>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-fpga-adc-testbench\"><span class=\"ez-toc-section\" id=\"FPGA-ADC-testbench\"><\/span>FPGA ADC testbench<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>A VHDL testbench modeling the LTC2314 behavior has been written in order to validate the FPGA ADC driver behavior.<\/p>\n\n\n<style>.kt-accordion-id1550_e497cf-c1 .kt-accordion-inner-wrap{column-gap:var(--global-kb-gap-md, 2rem);row-gap:1px;}.kt-accordion-id1550_e497cf-c1 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;border-top-left-radius:2px;border-top-right-radius:2px;border-bottom-right-radius:2px;border-bottom-left-radius:2px;background:#ffffff;padding-top:20px;padding-right:20px;padding-bottom:20px;padding-left:20px;}.kt-accordion-id1550_e497cf-c1 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;border-top-left-radius:2px;border-top-right-radius:2px;border-bottom-right-radius:2px;border-bottom-left-radius:2px;background:#ffffff;font-size:16px;line-height:24px;letter-spacing:0px;font-weight:bold;text-transform:none;color:var(--global-palette3, #1A202C);padding-top:12px;padding-right:10px;padding-bottom:8px;padding-left:16px;}.kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette3, #1A202C);}.kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger{background:var(--global-palette3, #1A202C);}.kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id1550_e497cf-c1 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id1550_e497cf-c1 .kt-blocks-accordion-header:focus-visible{color:#444444;background:#ffffff;border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion--visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#444444;}.kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger, body:not(.hide-focus-outline) .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger{background:#444444;}.kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id1550_e497cf-c1 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id1550_e497cf-c1 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{color:var(--global-palette3, #1A202C);background:var(--global-palette9, #ffffff);border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}.kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette3, #1A202C);}.kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger{background:var(--global-palette3, #1A202C);}.kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id1550_e497cf-c1:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette9, #ffffff);}@media all and (max-width: 1024px){.kt-accordion-id1550_e497cf-c1 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}}@media all and (max-width: 1024px){.kt-accordion-id1550_e497cf-c1 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}}@media all and (max-width: 1024px){.kt-accordion-id1550_e497cf-c1 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id1550_e497cf-c1 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}}@media all and (max-width: 1024px){.kt-accordion-id1550_e497cf-c1 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id1550_e497cf-c1 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}@media all and (max-width: 767px){.kt-accordion-id1550_e497cf-c1 .kt-accordion-inner-wrap{display:block;}.kt-accordion-id1550_e497cf-c1 .kt-accordion-inner-wrap .kt-accordion-pane:not(:first-child){margin-top:1px;}.kt-accordion-id1550_e497cf-c1 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}.kt-accordion-id1550_e497cf-c1 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}.kt-accordion-id1550_e497cf-c1 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id1550_e497cf-c1 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id1550_e497cf-c1 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id1550_e497cf-c1 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}<\/style>\n<div class=\"wp-block-kadence-accordion alignnone\"><div class=\"kt-accordion-wrap kt-accordion-id1550_e497cf-c1 kt-accordion-has-2-panes kt-active-pane-0 kt-accordion-block kt-pane-header-alignment-left kt-accodion-icon-style-arrow kt-accodion-icon-side-left\" style=\"max-width:none\"><div class=\"kt-accordion-inner-wrap\" data-allow-multiple-open=\"false\" data-start-open=\"none\">\n<div class=\"wp-block-kadence-pane kt-accordion-pane kt-accordion-pane-1 kt-pane1550_0d2ca7-7e\"><div class=\"kt-accordion-header-wrap\"><button class=\"kt-blocks-accordion-header kt-acccordion-button-label-show\"><span class=\"kt-blocks-accordion-title-wrap\"><span class=\"kt-blocks-accordion-title\"><strong>LTC2314 testbench source<\/strong><\/span><\/span><span class=\"kt-blocks-accordion-icon-trigger\"><\/span><\/button><\/div><div class=\"kt-accordion-panel kt-accordion-panel-hidden\"><div class=\"kt-accordion-panel-inner\"><pre class=\"wp-block-code\" aria-describedby=\"shcb-language-2\" data-shcb-language-name=\"VHDL\" data-shcb-language-slug=\"vhdl\"><span><code class=\"hljs language-vhdl\"><span class=\"hljs-keyword\">library<\/span> IEEE;\n<span class=\"hljs-keyword\">use<\/span> IEEE.STD_LOGIC_1164.<span class=\"hljs-keyword\">ALL<\/span>;\n<span class=\"hljs-keyword\">use<\/span> IEEE.NUMERIC_STD.<span class=\"hljs-keyword\">ALL<\/span>;\n \n<span class=\"hljs-keyword\">entity<\/span> LT2314_tb <span class=\"hljs-keyword\">is<\/span> <span class=\"hljs-keyword\">end<\/span>;\n \n<span class=\"hljs-keyword\">architecture<\/span> bench <span class=\"hljs-keyword\">of<\/span> LT2314_tb <span class=\"hljs-keyword\">is<\/span>\n     \n    <span class=\"hljs-comment\">-- number of blank bits provided by the ADC<\/span>\n    <span class=\"hljs-keyword\">constant<\/span> NBLANKBITS : <span class=\"hljs-built_in\">positive<\/span> := <span class=\"hljs-number\">1<\/span>;\n     \n    <span class=\"hljs-comment\">-- SCK = CLK_250_MHZ \/ (POSTSCALER*2) = 62.5 MHz<\/span>\n    <span class=\"hljs-keyword\">constant<\/span> SCK_POSTSCALER : <span class=\"hljs-built_in\">std_logic_vector<\/span> := <span class=\"hljs-string\">\"0000000000000010\"<\/span>;\n     \n    <span class=\"hljs-comment\">-- main clock period<\/span>\n    <span class=\"hljs-keyword\">constant<\/span> CLK_PERIOD : <span class=\"hljs-built_in\">time<\/span> := <span class=\"hljs-number\">4.0<\/span> ns; <span class=\"hljs-comment\">-- 250 MHz<\/span>\n     \n    <span class=\"hljs-comment\">-- simulated data sample produced by the ADC<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> rawdata : <span class=\"hljs-built_in\">unsigned<\/span>(<span class=\"hljs-number\">13<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>) := (<span class=\"hljs-keyword\">others<\/span>=&gt;<span class=\"hljs-string\">'0'<\/span>);\n     \n    <span class=\"hljs-comment\">-- clock signals<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> clk_250, sampling_pulse : <span class=\"hljs-built_in\">std_logic<\/span> := <span class=\"hljs-string\">'0'<\/span>;\n     \n    <span class=\"hljs-comment\">-- SPI signals<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> SPI_DIN, SPI_nCS, SPI_CLK : <span class=\"hljs-built_in\">std_logic<\/span> := <span class=\"hljs-string\">'0'<\/span>;\n     \n<span class=\"hljs-keyword\">begin<\/span>\n         \n    primary_clock: clk_250 &lt;= <span class=\"hljs-keyword\">not<\/span> clk_250 <span class=\"hljs-keyword\">after<\/span> CLK_PERIOD \/ <span class=\"hljs-number\">2<\/span>;\n         \n    <span class=\"hljs-comment\">--------------------------------------------------------------------------------<\/span>\n    <span class=\"hljs-comment\">-- DEVICE UNDER TEST<\/span>\n    <span class=\"hljs-comment\">--------------------------------------------------------------------------------<\/span>\n         \n    DUT: <span class=\"hljs-keyword\">entity<\/span> work.LT2314_driver\n    <span class=\"hljs-keyword\">port<\/span> <span class=\"hljs-keyword\">map<\/span>(\n        clk_250 =&gt; clk_250,\n        sampling_pulse =&gt; sampling_pulse,\n        postscaler_in =&gt; SCK_POSTSCALER,\n        spi_sck =&gt; SPI_CLK,\n        spi_cs_n =&gt; SPI_nCS,\n        spi_din =&gt; SPI_DIN,\n        data_out =&gt; <span class=\"hljs-keyword\">open<\/span>);\n         \n    <span class=\"hljs-comment\">--------------------------------------------------------------------------------<\/span>\n    <span class=\"hljs-comment\">-- ANALOG-TO-DIGITAL CONVERTER MODEL<\/span>\n    <span class=\"hljs-comment\">--------------------------------------------------------------------------------<\/span>\n         \n    DATA_SAMPLE: <span class=\"hljs-keyword\">process<\/span>\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> CLK_PERIOD*<span class=\"hljs-number\">100<\/span>;\n             \n        rawdata &lt;= to_unsigned(<span class=\"hljs-number\">12345<\/span>,<span class=\"hljs-number\">14<\/span>);\n        sampling_pulse &lt;= <span class=\"hljs-string\">'1'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> CLK_PERIOD;\n        sampling_pulse &lt;= <span class=\"hljs-string\">'0'<\/span>;\n             \n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> CLK_PERIOD*<span class=\"hljs-number\">100<\/span>;\n             \n        rawdata &lt;= to_unsigned(<span class=\"hljs-number\">5782<\/span>,<span class=\"hljs-number\">14<\/span>);\n        sampling_pulse &lt;= <span class=\"hljs-string\">'1'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> CLK_PERIOD;\n        sampling_pulse &lt;= <span class=\"hljs-string\">'0'<\/span>;\n             \n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> CLK_PERIOD*<span class=\"hljs-number\">100<\/span>;\n             \n        rawdata &lt;= to_unsigned(<span class=\"hljs-number\">777<\/span>,<span class=\"hljs-number\">14<\/span>);\n        sampling_pulse &lt;= <span class=\"hljs-string\">'1'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> CLK_PERIOD;\n        sampling_pulse &lt;= <span class=\"hljs-string\">'0'<\/span>;\n             \n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> DATA_SAMPLE;\n         \n    SPI_TARGET: <span class=\"hljs-keyword\">process<\/span>(SPI_nCS,SPI_CLK,SPI_DIN)\n    <span class=\"hljs-keyword\">variable<\/span> counter : <span class=\"hljs-built_in\">integer<\/span> := <span class=\"hljs-number\">0<\/span>;\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">if<\/span> SPI_nCS=<span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span>\n            SPI_DIN &lt;= <span class=\"hljs-string\">'Z'<\/span>;\n            counter := <span class=\"hljs-number\">13<\/span> + NBLANKBITS;\n        <span class=\"hljs-keyword\">elsif<\/span> SPI_nCS=<span class=\"hljs-string\">'0'<\/span> <span class=\"hljs-keyword\">and<\/span> falling_edge(SPI_CLK) <span class=\"hljs-keyword\">then<\/span>\n            <span class=\"hljs-keyword\">if<\/span> (counter &gt; <span class=\"hljs-number\">13<\/span> <span class=\"hljs-keyword\">or<\/span> counter &lt; <span class=\"hljs-number\">0<\/span>) <span class=\"hljs-keyword\">then<\/span>\n                SPI_DIN &lt;= <span class=\"hljs-string\">'0'<\/span>;\n            <span class=\"hljs-keyword\">else<\/span>\n                SPI_DIN &lt;= <span class=\"hljs-built_in\">std_logic<\/span>(rawdata(counter));\n            <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n            counter := counter - <span class=\"hljs-number\">1<\/span>;\n        <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> SPI_TARGET;\n         \n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">architecture<\/span> bench;<\/code><\/span><small class=\"shcb-language\" id=\"shcb-language-2\"><span class=\"shcb-language__label\">Code language:<\/span> <span class=\"shcb-language__name\">VHDL<\/span> <span class=\"shcb-language__paren\">(<\/span><span class=\"shcb-language__slug\">vhdl<\/span><span class=\"shcb-language__paren\">)<\/span><\/small><\/pre><\/div><\/div><\/div>\n<\/div><\/div><\/div>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1015\" height=\"383\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-121.png\" alt=\"SPI communication testbench results\" class=\"wp-image-2114\" title=\"Technical notes &gt; TN130: FPGA-based SPI communication IP for A\/D converter &gt; sandbox_spi_sim.png\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-121.png 1015w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-121-300x113.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-121-768x290.png 768w\" sizes=\"auto, (max-width: 1015px) 100vw, 1015px\" \/><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-deployment-on-the-b-board-pro-fpga\"><span class=\"ez-toc-section\" id=\"Deployment-on-the-B-Board-PRO-FPGA\"><\/span>Deployment on the B-Board PRO FPGA<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>To learn how to add a VHDL module into B-Board FPGA firmware using Xilinx Vivado, please read the <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-fpga-control-development\">getting started with FPGA<\/a> page. The ADC SPI driver has interfaced as follow:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><code>spi_sck<\/code> is connected to the physical pin <code>USR[0]<\/code><\/li>\n\n\n\n<li><code>spi_cs_n<\/code> is connected to the physical pin <code>USR[1]<\/code><\/li>\n\n\n\n<li><code>spi_din<\/code> is connected to the physical pin <code>USR[2]<\/code><\/li>\n\n\n\n<li><code>postscaler_in<\/code> is connected to <code>SBO_reg_00<\/code> (configuration register)<\/li>\n\n\n\n<li><code>data_out<\/code> is connected to <code>SBI_reg_00<\/code> (real-time register)<\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-simple-alerts-for-gutenberg-alert-boxes sab-alert sab-alert-info\" role=\"alert\">From SDK version 2024.2, ports SBI and SBO on the imperix IP are replaced by the SBIO_BUS. The <em>sbio_register <\/em>block must be used to access the SBI and SBO registers.  More information about SBIO_BUS can be found on the <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-fpga-control-development#SBIO_BUS\">Getting Started with FPGA Control Development page<\/a>.<\/div>\n\n\n\n<p>Furthermore, the signals <code>spi_sck<\/code>, <code>spi_cs_n,<\/code> <code>spi_din<\/code>, <code>data_out<\/code> and <code>sampling_pulse<\/code> are also connected to an Integrated Logic Analyzer (ILA), allowing them to be observed during run-time.<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"578\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-122-1024x578.png\" alt=\"Interfacing between the SPI driver and imperix IP\" class=\"wp-image-2115\" title=\"Technical notes &gt; TN130: FPGA-based SPI communication IP for A\/D converter &gt; sandbox_spi_vivado_blocks.png\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-122-1024x578.png 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-122-300x169.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-122-768x434.png 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-122.png 1259w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><figcaption class=\"wp-element-caption\">Interfacing of the ADC driver in the B-Board FPGA<\/figcaption><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-using-the-imperix-3-3v-usr-pins\"><span class=\"ez-toc-section\" id=\"Using-the-imperix-33V-USR-pins\"><\/span>Using the imperix 3.3V USR pins<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<p>The SPI signals (<code>SCK<\/code>, <code>nCS<\/code>, and <code>MISO<\/code>) of the ADC driver are connected to 3 of the 36 user-configurable 3.3V I\/Os of the B-Board (<code>usr_0<\/code>, <code>usr_1<\/code>, and <code>usr_2<\/code>). The physical pin constraint file <code>sandbox_pins.xdc<\/code> file must be edited by the user to match the external port names.<\/p>\n\n\n\n<div class=\"wp-block-simple-alerts-for-gutenberg-alert-boxes sab-alert sab-alert-info\" role=\"alert\">From version 3.7, a USR interface is present in the imperix firmware IP. This port must be disconnected to use USR pins for other applications. Imperix only uses USR for communication with the <a href=\"https:\/\/imperix.com\/products\/electric-motor-drive-bundle\/\">motor interface<\/a>.<\/div>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"663\" height=\"347\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2022\/04\/image-38.png\" alt=\"\" class=\"wp-image-11910\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2022\/04\/image-38.png 663w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2022\/04\/image-38-300x157.png 300w\" sizes=\"auto, (max-width: 663px) 100vw, 663px\" \/><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-experimental-results\"><span class=\"ez-toc-section\" id=\"Experimental-results\"><\/span>Experimental results<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The following hardware was used:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><a href=\"https:\/\/imperix.com\/products\/control\/inverter-control-board\/\">B-Board evaluation kit<\/a><\/li>\n\n\n\n<li>LTC2314 demonstration circuit<\/li>\n\n\n\n<li>Xilinx JTAG Platform Cable USB II<\/li>\n\n\n\n<li>DSLogic Plus logic analyzer<\/li>\n<\/ul>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"768\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-10-1024x768.jpeg\" alt=\"Experimental setup of the SPI communication\" class=\"wp-image-2116\" title=\"Technical notes &gt; TN130: FPGA-based SPI communication IP for A\/D converter &gt; IMG_20200218_091739.jpg\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-10-1024x768.jpeg 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-10-300x225.jpeg 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-10-768x576.jpeg 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-10-1536x1152.jpeg 1536w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-10-2048x1536.jpeg 2048w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<p>The following C++ code has been used to test the LT2314 driver.<\/p>\n\n\n<pre class=\"wp-block-code\" aria-describedby=\"shcb-language-3\" data-shcb-language-name=\"C++\" data-shcb-language-slug=\"cpp\"><span><code class=\"hljs language-cpp\"><span class=\"hljs-function\">define <span class=\"hljs-title\">ADC_GAIN<\/span> <span class=\"hljs-params\">(<span class=\"hljs-number\">4.096<\/span>\/<span class=\"hljs-number\">8192.0<\/span>)<\/span>\n \n<span class=\"hljs-keyword\">int<\/span> adc_raw<\/span>;\n<span class=\"hljs-keyword\">float<\/span> Vmeas;\n \n<span class=\"hljs-function\">tUserSafe <span class=\"hljs-title\">UserInit<\/span><span class=\"hljs-params\">(<span class=\"hljs-keyword\">void<\/span>)<\/span>\n<\/span>{\n  Clock_SetFrequency(CLOCK_0, <span class=\"hljs-number\">20e3<\/span>);\n  ConfigureMainInterrupt(UserInterrupt, CLOCK_0, <span class=\"hljs-number\">0.5<\/span>);\n \n  Sbi_ConfigureAsRealTime(<span class=\"hljs-number\">0<\/span>); <span class=\"hljs-comment\">\/\/ SBI_reg_00 contains the ADC value (LT2314_driver data_out)<\/span>\n  Sbo_WriteDirectly(<span class=\"hljs-number\">0<\/span>, <span class=\"hljs-number\">2<\/span>);    <span class=\"hljs-comment\">\/\/ SBO_reg_00 is the clk postscaler (LT2314_driver postscaler_in)<\/span>\n                              <span class=\"hljs-comment\">\/\/ postscaler = 2 -&gt; SCK = 62.5 MHz<\/span>\n  <span class=\"hljs-keyword\">return<\/span> SAFE;\n}\n \n<span class=\"hljs-function\">tUserSafe <span class=\"hljs-title\">UserInterrupt<\/span><span class=\"hljs-params\">(<span class=\"hljs-keyword\">void<\/span>)<\/span>\n<\/span>{\n  adc_raw = Sbi_Read(<span class=\"hljs-number\">0<\/span>); <span class=\"hljs-comment\">\/\/ read SBI_reg_00<\/span>\n  Vmeas = adc_raw * ADC_GAIN; <span class=\"hljs-comment\">\/\/ convert to Volts<\/span>\n \n  <span class=\"hljs-keyword\">return<\/span> SAFE;\n}<\/code><\/span><small class=\"shcb-language\" id=\"shcb-language-3\"><span class=\"shcb-language__label\">Code language:<\/span> <span class=\"shcb-language__name\">C++<\/span> <span class=\"shcb-language__paren\">(<\/span><span class=\"shcb-language__slug\">cpp<\/span><span class=\"shcb-language__paren\">)<\/span><\/small><\/pre>\n\n\n<p>The external SPI signals can be observed using a physical logic analyzer such as the DSLogic Plus:<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"790\" height=\"195\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-123.png\" alt=\"Experimental results from logic analyzer of the SPI communication\" class=\"wp-image-2117\" title=\"Technical notes &gt; TN130: FPGA-based SPI communication IP for A\/D converter &gt; sandbox_spi_dslogic.png\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-123.png 790w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-123-300x74.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-123-768x190.png 768w\" sizes=\"auto, (max-width: 790px) 100vw, 790px\" \/><\/figure>\n\n\n\n<p>Secondly, the Xilinx Integrated Logic Analyzer (ILA) allows to observe internal signals too:<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1002\" height=\"182\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-124.png\" alt=\"Experimental results from Xilinx Integrated Logic Analyzer of the SPI communication\" class=\"wp-image-2118\" title=\"Technical notes &gt; TN130: FPGA-based SPI communication IP for A\/D converter &gt; sandbox_spi_ILA.png\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-124.png 1002w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-124-300x54.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-124-768x139.png 768w\" sizes=\"auto, (max-width: 1002px) 100vw, 1002px\" \/><\/figure>\n\n\n\n<p>Finally, the end result can be plotted in the <a href=\"https:\/\/imperix.com\/doc\/help\/cockpit-user-guide\">Cockpit monitoring software<\/a>, attesting that the SPI module works correctly.<\/p>\n\n\n\n<div class=\"wp-block-simple-alerts-for-gutenberg-alert-boxes sab-alert sab-alert-dark\" role=\"alert\">Back to\u00a0<a href=\"https:\/\/imperix.com\/doc\/help\/fpga-development-on-imperix-controllers\">FPGA development homepage<\/a><\/div>\n","protected":false},"excerpt":{"rendered":"<p>This technical note shows how an SPI communication link can be established between an FPGA and an external Analog-to-Digital Converter (ADC). The development setup will&#8230;<\/p>\n","protected":false},"author":4,"featured_media":3050,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"_kad_post_classname":"","footnotes":""},"categories":[4],"tags":[17],"software-environments":[106],"provided-results":[108,107],"related-products":[50,31,32,92,166],"guidedreadings":[],"tutorials":[],"user-manuals":[],"coauthors":[70],"class_list":["post-1550","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-implementation","tag-fpga-programming","software-environments-fpga","provided-results-experimental","provided-results-simulation","related-products-acg-sdk","related-products-b-board-pro","related-products-b-box-rcp","related-products-b-box-micro","related-products-b-box-rcp-3-0"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.4 - 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