{"id":1564,"date":"2021-04-02T12:37:03","date_gmt":"2021-04-02T12:37:03","guid":{"rendered":"https:\/\/imperix.com\/doc\/?p=1564"},"modified":"2026-02-26T08:04:34","modified_gmt":"2026-02-26T08:04:34","slug":"config-control-task-configuration","status":"publish","type":"post","link":"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration","title":{"rendered":"CONFIG &#8211; Control task configuration"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_82_2 ez-toc-wrap-right-text counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Key-principles-of-operation\" >Key principles of operation<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Typical-timing-configurations\" >Typical timing configurations<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Block-parameters\" >Block parameters<\/a><ul class='ez-toc-list-level-3' ><li class='ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Timings\" >Timings<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Code-generation\" >Code generation<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Simulation\" >Simulation<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Legacy-parameters\" >Legacy parameters<\/a><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Simulink-block\" >Simulink block<\/a><ul class='ez-toc-list-level-3' ><li class='ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Signal-specification\" >Signal specification<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-10\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Mask\" >Mask<\/a><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-11\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#PLECS-block\" >PLECS block<\/a><ul class='ez-toc-list-level-3' ><li class='ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-12\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#Mask-2\" >Mask<\/a><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-13\" href=\"https:\/\/imperix.com\/doc\/software\/config-control-task-configuration\/#C-functions\" >C++ functions<\/a><\/li><\/ul><\/nav><\/div>\n\n<p>The CONFIG block primarily serves to configure the main clock (CLK0) as well as its derivatives. Together, these clocks define the frequency and phase of the sampling events as well as the timing of the CPU interrupt (triggering the execution of the control task). CLK0 being indispensable to the proper operation of the hardware, so is the CONFIG block.<\/p>\n\n\n\n<p>Secondary configuration options are also appended to the CONFIG block, such as:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The model execution purpose (Simulink only) &#8211; See <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-acg-sdk\">PN134<\/a>.<\/li>\n\n\n\n<li>The target hardware generation (Simulink only) &#8211; See <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-acg-sdk\">PN134<\/a>.<\/li>\n\n\n\n<li>Solver parameters &#8211; See below.<\/li>\n\n\n\n<li>Plant-side modeling options &#8211; See <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-imperix-power-library\">PN150<\/a>.<\/li>\n<\/ul>\n\n\n\n<p>The CONFIG block is available for all imperix controllers, on which it behaves identically.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Key-principles-of-operation\"><\/span>Key principles of operation<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>Imperix controllers offer four configurable times bases, configurable using the CLK0-CLK3 signals. CLK0 deserves particular attention as it is always active and statically associated to the sampling and control tasks. CLK0 is also limited to a constant frequency, thereby imposing regular sampling. CLK1-CLK3 are optional signals, which can be of variable frequency and freely associated to different modulators (see <a href=\"https:\/\/imperix.com\/doc\/software\/clock-generators\">CLK<\/a> block).<\/p>\n\n\n\n<p>Several clocks are derived from CLK0, the two most important of which are:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The physical sampling base clock SCLK, of frequency <strong>F<sub>SCLK<\/sub><\/strong>. It only differs from CLK0 by a configurable sampling phase (constant).<\/li>\n\n\n\n<li>The CPU interrupt, responsible for launching the control task, of frequency <strong>F<sub>CPU<\/sub><\/strong>. If needed, F<sub><sub>CPU<\/sub><\/sub> can be defined as a decimated derivative of F<sub><sub>SCLK<\/sub><\/sub> using a post-scaling coefficient.<\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-simple-alerts-for-gutenberg-alert-boxes sab-alert sab-alert-info\" role=\"alert\">Unlike other imperix controllers, the B-Box 4 supports the oversampling of its analog inputs at 20Msps. For that, CLK0 is constrained such that it is a sub-multiple of 20MHz. As such, ADCs produce an integer number of samples per SCLK period, which can be freely used with channel-specific configurations. <\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Typical-timing-configurations\"><\/span>Typical timing configurations<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>With imperix controllers, the timing configuration for the sampling, control and modulation is essentially made by adequately wiring the corresponding blocks to the four time bases (i.e. CLK0-CLK3). The following configurations are notably possible:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Single-rate sampling<\/strong>, in which case the control task is executed once per PWM period. Sampling, control and modulation are all linked to CLK0, with adequate phase-shifts. This case is the default configuration implemented in most examples.<\/li>\n\n\n\n<li><strong>Double-rate sampling<\/strong>, in which case the control task is executed twice per PWM period. Sampling and control are linked to CLK0 (with adequate phase-shift), whereas modulation must be linked to another clock (e.g. CLK1), configured at half the frequency of CLK0. This case gives best performance, provided that sufficient CPU time is available. <\/li>\n\n\n\n<li><strong>Advanced sampling configurations<\/strong> are also possible, typically authorizing to retrieve multiple samples at once (data history), variable-frequency switching, or running FPGA-based control tasks at a higher rate than the CPU. <\/li>\n<\/ul>\n\n\n\n<p>Inside Simulink\/PLECS, the two clocks available as outputs of the CONFIG block can be easily used for implementing the above-described scenarios. In practice, they serve the two following purposes:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>In <strong>simulation mode<\/strong>, the sampling clock SCLK is indispensable to properly account for the exact sampling instant within the simulation model. This is also essential to properly model the discrete nature of the control&#8217;s execution. Similarly, the CLK0 output is also important to take into account the relative phase of the modulation with respect to the sampling, as well as potential phase-shifts between modulators.<\/li>\n\n\n\n<li>In <strong>code generation mode<\/strong>, these signals do not infer any software variable, but are analyzed by Simulink\/PLECS as to properly map the connected resources to the physical hardware clocks.<\/li>\n<\/ul>\n\n\n\n<p>More details regarding how Simulink and PLECS handle thes ascpects are presented in&nbsp;<a href=\"https:\/\/imperix.com\/doc\/help\/simulation-essentials-simulink\">PN135<\/a>&nbsp;(Simulink) and&nbsp;<a href=\"https:\/\/imperix.com\/doc\/help\/simulation-essentials-plecs\">PN137<\/a>&nbsp;(PLECS).<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Block-parameters\"><\/span>Block parameters<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-control-task-parameters\"><span class=\"ez-toc-section\" id=\"Timings\"><\/span>Timings<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The <strong>CLK0 frequency<\/strong> sets the main clock frequency F<sub>CLK0<\/sub>, which provides the time base for generating the ADC sampling strobe SCLK.<\/li>\n\n\n\n<li>The <strong>sampling phase<\/strong> sets the phase-shift of the ADC sampling strobe SCLK relative to CLK0. The CPU control task is executed immediately once the values are available. If the modulators are also tied to CLK0, equivalences exist between phase-shifting the sampling or the modulation.<\/li>\n\n\n\n<li>The <strong>postscaler<\/strong> is used to decimate the CPU task execution rate relatively to SCLK such that<br>F<sub>CPU<\/sub> = F<sub>CLK0<\/sub> \/ <code>postscaler<\/code>.<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-advanced-sampling-parameters\"><span class=\"ez-toc-section\" id=\"Code-generation\"><\/span>Code generation<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The <strong>Target<\/strong> is a Simulink-specific parameter that defines which hardware the code will be generated for. In PLECS,  the equivalent parameter is located in <strong>Coder<\/strong> -&gt; <strong>Coder option&#8230; <\/strong>(Ctrl+Alt+B). The two possible options are:\n<ul class=\"wp-block-list\">\n<li><em>Gen 3 (B-Box RCP3.0, B-Box Micro, B-Board PRO, TPI)<\/em><\/li>\n\n\n\n<li><em>Gen 4 (B-Box 4 only)<\/em><\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-simple-alerts-for-gutenberg-alert-boxes sab-alert sab-alert-info\" role=\"alert\">In multi-target configurations, the selection of Gen.3\/Gen.4 only concerns the master device, which is the one receiving and executing the code. Slaves do not need to be of the same generation. <\/div>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The <strong>ADC acquisition delay<\/strong> corresponds to complete conversion time, counted from the ADC sampling instant (identical for all channels) to the availability of the data in the CPU cache, right before the execution of the control task. This parameter can take multiples values amongst imperix controllers. The available options are:\n<ul class=\"wp-block-list\">\n<li><em>Auto (as fast as possible, recommended)<\/em> &#8211; This automatically selects the fastest possible option. This is identified at launch time, as slaves may be connected to the target.<\/li>\n\n\n\n<li><em>2 \u03bcs (all devices)<\/em> &#8211; This conservative legacy setting is available for all controllers.<\/li>\n\n\n\n<li><em>500 ns (all devices except B-Box RCP 3.0)<\/em>  &#8211; This setting is available for all controllers except B-Box 3.<\/li>\n\n\n\n<li><em>200\/368 ns (B-Box 4 only)<\/em> &#8211; This high-performance setting is only available on B-Box 4.<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-advanced-sampling-parameters\"><span class=\"ez-toc-section\" id=\"Simulation\"><\/span>Simulation<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Basic <strong>Solver <\/strong>parameters can be directly set in the associated tab. These are coming from the &#8220;Model Configuration Parameters&#8221; (Ctrl+E), with which they are automatically synchronized. These solver parameters only apply to the variable-step solver used in simulation mode. <\/li>\n\n\n\n<li>The <strong>Computation delay<\/strong> is exclusively used in simulation mode. It serves to accurately model the total time required for computing the control task, impacting the moment at which the PWM parameters are actually updated. As such, it sums up the delays involved in the control dynamics (ADC acquisition, data read, control task execution, data write). <br>As the cycle delay cannot be known before the control code is actually run on the target, this parameter must be measured during run time and adjusted accordingly. To this end, the <a href=\"https:\/\/imperix.com\/doc\/help\/cockpit-user-guide\">Cockpit timings tab<\/a> provides the necessary information.<\/li>\n\n\n\n<li>The <strong>Power library<\/strong> parameters are documented in the <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-imperix-power-library\">Getting started with Imperix Power library<\/a> page.<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Legacy-parameters\"><\/span>Legacy parameters<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The <strong>SCLK multiplier<\/strong> parameter (previously called <em>oversampling<\/em>) allows setting a multiplier such that F<sub>SCLK<\/sub> = F<sub>CLK0<\/sub> x <code>multiplier<\/code>. This parameter is maintained for legacy reasons. To obtain a sampling frequency higher than the CPU execution frequency, it is rather recommended to increase F<sub>CLK0<\/sub> and use the postscaler. <\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-simulink-block\"><span class=\"ez-toc-section\" id=\"Simulink-block\"><\/span>Simulink block<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<h3 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Signal-specification\"><\/span>Signal specification<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:66.66%\">\n<ul class=\"wp-block-list\">\n<li>The first output is the PWM clock signal. It can be connected to the <code>&gt;<\/code> input of any <a href=\"https:\/\/imperix.com\/doc\/software\/pulse-width-modulator\">PWM<\/a> block to associate it to CLK0.<\/li>\n\n\n\n<li>The second output is the sampling clock signal SCLK. It must be connected to the <code>&gt;<\/code> input signal of all the <a href=\"https:\/\/imperix.com\/doc\/software\/analog-data-acquisition\">ADC<\/a> blocks.<\/li>\n<\/ul>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:33.33%\"><div class=\"wp-block-image\">\n<figure class=\"aligncenter size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"109\" height=\"70\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/02\/image-34.png\" alt=\"\" class=\"wp-image-24468\"\/><\/figure>\n<\/div><\/div>\n<\/div>\n\n\n\n<p>The behavior of these signals during simulations is described in <a href=\"https:\/\/imperix.com\/doc\/help\/simulation-essentials-simulink\">Simulation essentials with Simulink (PN135)<\/a>.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Mask\"><\/span>Mask<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"418\" height=\"716\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config1-1.png\" alt=\"\" class=\"wp-image-37709\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config1-1.png 418w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config1-1-175x300.png 175w\" sizes=\"auto, (max-width: 418px) 100vw, 418px\" \/><figcaption class=\"wp-element-caption\">Configuration of CLK0 parameters<\/figcaption><\/figure>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"418\" height=\"716\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config3.png\" alt=\"\" class=\"wp-image-37715\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config3.png 418w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config3-175x300.png 175w\" sizes=\"auto, (max-width: 418px) 100vw, 418px\" \/><figcaption class=\"wp-element-caption\">Configuration of simulation-related parameters (1\/2)<\/figcaption><\/figure>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"418\" height=\"716\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config2-1.png\" alt=\"\" class=\"wp-image-37710\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config2-1.png 418w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config2-1-175x300.png 175w\" sizes=\"auto, (max-width: 418px) 100vw, 418px\" \/><figcaption class=\"wp-element-caption\">Selection of the target device and generation<\/figcaption><\/figure>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"418\" height=\"716\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config4-2.png\" alt=\"\" class=\"wp-image-37716\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config4-2.png 418w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config4-2-175x300.png 175w\" sizes=\"auto, (max-width: 418px) 100vw, 418px\" \/><figcaption class=\"wp-element-caption\">Configuration of simulation-related parameters (2\/2)<\/figcaption><\/figure>\n<\/div>\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-plecs-block\"><span class=\"ez-toc-section\" id=\"PLECS-block\"><\/span>PLECS block<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:66.66%\">\n<ul class=\"wp-block-list\">\n<li>The <strong><code>Task <\/code><\/strong>output must be connected to the <em>Control Task Trigger<\/em> block. The <em>Control Task Trigger <\/em><code>nominal base sample time<\/code> must be equal to <code>postscaler<\/code>\/<code>CLOCK_0 <\/code>frequency.<\/li>\n\n\n\n<li>The <strong><code>PWM<\/code> <\/strong>clock signal must be connected to the <code>&gt;<\/code> input of the <a href=\"https:\/\/imperix.com\/doc\/software\/pulse-width-modulator\">PWM<\/a> blocks to set their frequency to the CLK0 frequency.<\/li>\n\n\n\n<li>The <strong><code>ADC<\/code> <\/strong>clock output is the sampling signal SCLK. It must be connected to the <code>&gt;<\/code> input signal of all the <a href=\"https:\/\/imperix.com\/doc\/software\/analog-data-acquisition\">ADC<\/a> blocks.<\/li>\n<\/ul>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:33.33%\"><div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"97\" height=\"91\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/config2.png\" alt=\"\" class=\"wp-image-37518\" title=\"Quick help &gt; CONFIG - Control task configuration &gt; image2020-10-27_10-45-24.png\"\/><\/figure>\n<\/div><\/div>\n<\/div>\n\n\n\n<p>The behavior of these signals during simulations is described in <a href=\"https:\/\/imperix.com\/doc\/help\/simulation-essentials-plecs\">Simulation essentials with PLECS (PN137)<\/a><\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-advanced-sampling-parameters-1\"><span class=\"ez-toc-section\" id=\"Mask-2\"><\/span>Mask<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"646\" height=\"405\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-247.png\" alt=\"\" class=\"wp-image-37733\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-247.png 646w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-247-300x188.png 300w\" sizes=\"auto, (max-width: 646px) 100vw, 646px\" \/><\/figure>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"646\" height=\"405\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-249.png\" alt=\"\" class=\"wp-image-37735\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-249.png 646w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-249-300x188.png 300w\" sizes=\"auto, (max-width: 646px) 100vw, 646px\" \/><\/figure>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"646\" height=\"405\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-248.png\" alt=\"\" class=\"wp-image-37734\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-248.png 646w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-248-300x188.png 300w\" sizes=\"auto, (max-width: 646px) 100vw, 646px\" \/><\/figure>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"646\" height=\"405\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-250.png\" alt=\"\" class=\"wp-image-37736\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-250.png 646w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-250-300x188.png 300w\" sizes=\"auto, (max-width: 646px) 100vw, 646px\" \/><\/figure>\n<\/div>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\">Changing the <strong>postscaler <\/strong>in PLECS<\/h4>\n\n\n\n<p>In PLECS, the <em>discretization step size<\/em> must match the CPU control task period for the generated code to behavior properly. When using the <strong>postscaler<\/strong>, the <em>discretization step size<\/em> must be set to <code><strong>postscaler\/F<sub>CLK0<\/sub><\/strong><\/code>. A simulation variable can be used for convenience, as illustrated below:<\/p>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<p>1. Create a <code>postscaler<\/code> variable in <strong>Simulation <\/strong>-&gt; <strong>Simulation parameters<\/strong> (Ctrl+E).<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"549\" height=\"421\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-240.png\" alt=\"\" class=\"wp-image-37324\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-240.png 549w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-240-300x230.png 300w\" sizes=\"auto, (max-width: 549px) 100vw, 549px\" \/><\/figure>\n\n\n\n<p>2. Use the <code>postscaler<\/code> variable in the CONFIG block mask.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"475\" height=\"420\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-242.png\" alt=\"\" class=\"wp-image-37327\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-242.png 475w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-242-300x265.png 300w\" sizes=\"auto, (max-width: 475px) 100vw, 475px\" \/><\/figure>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<p>3. Update the <em>discretization step size<\/em> in <strong>Coder <\/strong>-&gt; <strong>Coder options<\/strong> (Ctrl+Alt+B)<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"590\" height=\"420\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-241.png\" alt=\"\" class=\"wp-image-37325\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-241.png 590w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/image-241-300x214.png 300w\" sizes=\"auto, (max-width: 590px) 100vw, 590px\" \/><\/figure>\n<\/div>\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-c-functions\"><span class=\"ez-toc-section\" id=\"C-functions\"><\/span>C++ functions<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n<style>.kt-accordion-id1564_d622a0-cb .kt-accordion-inner-wrap{column-gap:var(--global-kb-gap-md, 2rem);row-gap:1px;}.kt-accordion-id1564_d622a0-cb .kt-accordion-panel-inner{border-top:2px solid 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.kt-accordion-inner-wrap{display:block;}.kt-accordion-id1564_d622a0-cb .kt-accordion-inner-wrap .kt-accordion-pane:not(:first-child){margin-top:1px;}.kt-accordion-id1564_d622a0-cb .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}.kt-accordion-id1564_d622a0-cb > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}.kt-accordion-id1564_d622a0-cb > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id1564_d622a0-cb .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id1564_d622a0-cb .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id1564_d622a0-cb > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}<\/style>\n<div class=\"wp-block-kadence-accordion alignnone\"><div class=\"kt-accordion-wrap kt-accordion-id1564_d622a0-cb kt-accordion-has-2-panes kt-active-pane-0 kt-accordion-block kt-pane-header-alignment-left kt-accodion-icon-style-arrow kt-accodion-icon-side-left\" style=\"max-width:none\"><div class=\"kt-accordion-inner-wrap\" data-allow-multiple-open=\"false\" data-start-open=\"none\">\n<div class=\"wp-block-kadence-pane kt-accordion-pane kt-accordion-pane-1 kt-pane1564_181146-51\"><div class=\"kt-accordion-header-wrap\"><button class=\"kt-blocks-accordion-header kt-acccordion-button-label-show\" type=\"button\"><span class=\"kt-blocks-accordion-title-wrap\"><span class=\"kt-blocks-accordion-title\"><code>ConfigureMainInterrupt <\/code>\u2014 Configure the CPU control task routine<\/span><\/span><span class=\"kt-blocks-accordion-icon-trigger\"><\/span><\/button><\/div><div class=\"kt-accordion-panel kt-accordion-panel-hidden\"><div class=\"kt-accordion-panel-inner\"><pre class=\"wp-block-code\" aria-describedby=\"shcb-language-1\" data-shcb-language-name=\"C++\" data-shcb-language-slug=\"cpp\"><span><code class=\"hljs language-cpp shcb-wrap-lines\"><span class=\"hljs-function\"><span class=\"hljs-keyword\">void<\/span> <span class=\"hljs-title\">ConfigureMainInterrupt<\/span><span class=\"hljs-params\">(tUserSafe (*userCallback)(<span class=\"hljs-keyword\">void<\/span>), tClock clock, <span class=\"hljs-keyword\">float<\/span> phase, <span class=\"hljs-keyword\">unsigned<\/span> <span class=\"hljs-keyword\">int<\/span> postscaler=<span class=\"hljs-number\">0<\/span>)<\/span><\/span>;<\/code><\/span><small class=\"shcb-language\" id=\"shcb-language-1\"><span class=\"shcb-language__label\">Code language:<\/span> <span class=\"shcb-language__name\">C++<\/span> <span class=\"shcb-language__paren\">(<\/span><span class=\"shcb-language__slug\">cpp<\/span><span class=\"shcb-language__paren\">)<\/span><\/small><\/pre>\n\n\n<p>Configures the user control task routine.<\/p>\n\n\n\n<p><strong>Parameters<\/strong><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><code>userCallback<\/code>: pointer on the control task callback function that is called at each interrupt<\/li>\n\n\n\n<li><code>clock<\/code>: defines the CLK used to trigger the sampling and interrupt. It must be set to <code>CLOCK_0<\/code>.<\/li>\n\n\n\n<li><code>phase<\/code>: sets the ADC sampling phase relative to <code>CLOCK_0<\/code>. The interrupt is executed right after the ADC acquisition ended.<\/li>\n\n\n\n<li><code>poscaler<\/code>: divides the CPU task frequency such as F<sub>CPU<\/sub> = F<sub>CLK0<\/sub> \/ postscaler.<\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-simple-alerts-for-gutenberg-alert-boxes sab-alert sab-alert-info\" role=\"alert\">The CLK0 frequency is set using the <code>Clock_SetFrequency(tClock clock, float freq);<\/code> function documented in the <a href=\"https:\/\/imperix.com\/doc\/software\/clock-generators\">CLK<\/a> software reference page.<\/div>\n<\/div><\/div><\/div>\n<\/div><\/div><\/div>\n","protected":false},"excerpt":{"rendered":"<p>The CONFIG block primarily serves to configure the main clock (CLK0) as well as its derivatives. Together, these clocks define the frequency and phase of&#8230;<\/p>\n","protected":false},"author":7,"featured_media":33315,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"_kad_post_classname":"","footnotes":""},"categories":[16],"tags":[],"software-environments":[105,103,104],"provided-results":[],"related-products":[50,31,32,92,166,51,113,114,112,111,110],"guidedreadings":[],"tutorials":[],"user-manuals":[],"coauthors":[71],"class_list":["post-1564","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-software","software-environments-c-plus-plus","software-environments-matlab","software-environments-plecs","related-products-acg-sdk","related-products-b-board-pro","related-products-b-box-rcp","related-products-b-box-micro","related-products-b-box-rcp-3-0","related-products-cpp-sdk","related-products-mmc","related-products-motor","related-products-peb","related-products-pm","related-products-tpi"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.4 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>CONFIG - Control task configuration - Software documentation<\/title>\n<meta name=\"description\" content=\"This page contains the documentation of the Control task configuration block. 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