{"id":2621,"date":"2021-04-09T08:39:02","date_gmt":"2021-04-09T08:39:02","guid":{"rendered":"https:\/\/imperix.com\/doc\/?p=2621"},"modified":"2025-05-07T10:45:51","modified_gmt":"2025-05-07T10:45:51","slug":"synchronous-reference-frame-pll","status":"publish","type":"post","link":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll","title":{"rendered":"Synchronous reference frame (SRF) PLL"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_82_2 ez-toc-wrap-right-text counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\/#What-is-a-synchronous-reference-frame-PLL\" >What is a synchronous reference frame PLL?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\/#SRF-PLL-implementation\" >SRF PLL implementation<\/a><ul class='ez-toc-list-level-3' ><li class='ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\/#Software-implementation\" >Software implementation<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\/#Tuning-of-SRF-PLL\" >Tuning of SRF PLL<\/a><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\/#Going-further-Double-Decoupled-Synchronous-Reference-Frame-DDSRF-PLL\" >Going further : Double Decoupled Synchronous Reference Frame (DDSRF) PLL<\/a><ul class='ez-toc-list-level-3' ><li class='ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\/#Decoupling\" >Decoupling<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\/#Implementation-of-the-DDSRF-PLL\" >Implementation of the DDSRF-PLL<\/a><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\/#Academic-references\" >Academic references<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\/#Use-case-examples\" >Use case examples<\/a><\/li><\/ul><\/nav><\/div>\n\n<p>This note provides insights into the operating principle of a synchronous reference frame PLL (SRF PLL), also known as DQ-type PLL. An implementation of an SRF PLL is found in the <a href=\"https:\/\/imperix.com\/software\/acg-sdk\/simulink\/\">ACG SDK<\/a> as the <a href=\"https:\/\/imperix.com\/doc\/software\/dq-type-pll\">DQ-type PLL<\/a> block and in the <a href=\"https:\/\/imperix.com\/software\/cpp-sdk\/\">CPP SDK<\/a> in the API folder of the template project. For a different type of PLL, please refer to the page on the <a href=\"https:\/\/imperix.com\/doc\/implementation\/sogi-pll\">SOGI PLL<\/a>. Also, note that this page will focus on the three-phase implementation of the PLL. Single phase PLL are discussed in <a href=\"https:\/\/imperix.com\/doc\/implementation\/fictive-axis-emulation-fae-for-single-phase-inverter\">Fictive axis emulation (FAE) for single-phase inverter<\/a>. Finally, typical use cases for DQ-type PLLs are listed at the end of the page.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-what-is-a-synchronous-reference-frame-pll\"><span class=\"ez-toc-section\" id=\"What-is-a-synchronous-reference-frame-PLL\"><\/span>What is a synchronous reference frame PLL?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>Most of today&#8217;s grid-tied power converters aim to control active and reactive power flow. Accurate phase tracking systems are then required to synchronize the controlled currents or voltages with the utility grid voltages. Many grid-synchronization techniques exist and an extensive review of the possible implementations can be found in the <a href=\"https:\/\/imperix.com\/doc\/implementation\/grid-synchronization-methods\">Grid synchronization methods<\/a> page or in [1].<\/p>\n\n\n\n<p>A synchronous reference frame PLL is a basic type of phase-locked loop based on the Park transform. In a nutshell, the SRF PLL is built using a Park transformation that acts as a phase detector, a low-pass filter (LPF) usually in the form of a PI regulator, and a voltage-controlled oscillator (VCO) typically made from an integrator [2]. The objective of this PLL is then to minimize either the direct or quadrature axis reference voltage. This will then ensure that the phase angle of the rotating reference frame of the park transformation matches the phase angle of the utility grid voltage vector [3].<\/p>\n\n\n\n<p>The general principle of an SRF PLL is given below:<\/p>\n\n\n\n<div class=\"wp-block-image\"><figure class=\"aligncenter size-large is-resized\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SRF_PLL-2.png\" alt=\"Block diagram of SRF PLL\" class=\"wp-image-28933\" width=\"403\" height=\"94\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SRF_PLL-2.png 403w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SRF_PLL-2-300x70.png 300w\" sizes=\"auto, (max-width: 403px) 100vw, 403px\" \/><figcaption>The general principle of the SRF PLL<\/figcaption><\/figure><\/div>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-srf-pll-implementation\"><span class=\"ez-toc-section\" id=\"SRF-PLL-implementation\"><\/span>SRF PLL implementation<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>As mentioned, the idea behind the synchronous reference frame PLL is to detect the phase angle by synchronizing the rotating frame reference of the PLL to the utility grid voltages, ensuring that \\(V_q = 0\\). The structure proposed for the SRF-PLL is shown below. The park transform and the PI controller are very classic. Additionally, \\(V_q\\) is normalized so that the tuning of the PI controller does not depend on the amplitude of the grid voltage. Finally, the integrator is based on the forward Euler method, with the only specificity being that the output is wrapped between \\([0; 2\\pi[\\).<\/p>\n\n\n\n<figure class=\"wp-block-image size-large is-resized\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SimulinkImplementation-2-1024x207.png\" alt=\"Simulink implementation of the SRF PLL\" class=\"wp-image-29317\" width=\"780\" height=\"158\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SimulinkImplementation-2-1024x207.png 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SimulinkImplementation-2-300x61.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SimulinkImplementation-2-768x156.png 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SimulinkImplementation-2.png 1368w\" sizes=\"auto, (max-width: 780px) 100vw, 780px\" \/><figcaption>Implementation of the three-phase SRF PLL<\/figcaption><\/figure>\n\n\n\n<p>Moreover, when the estimated frequency from the PLL is used for applications beyond the PLL itself, it is highly recommended to filter the frequency estimation using a low-pass filter with a cutoff frequency of around 15 Hz. This ensures a smooth and reliable frequency estimation for stable performance in different applications. <\/p>\n\n\n\n<p>Regarding the dynamic performances of the SRF PLL, it is difficult to get both fast-tracking and good filtering characteristics. Indeed, as stated in [2], a trade-off between these two characteristics is necessary when tuning the control loop parameters. For a PLL with better dynamic performance, one can look into the page: <a href=\"https:\/\/imperix.com\/doc\/implementation\/sogi-pll\">SOGI PLL<\/a>.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Software-implementation\"><\/span>Software implementation<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<p><em>Simulink model<\/em><\/p>\n\n\n\n<div class=\"wp-block-file\"><a href=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SRF_DDSRF_Simulink.slx\">SRF_DDSRF_Simulink<\/a><a href=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SRF_DDSRF_Simulink.slx\" class=\"wp-block-file__button\" download>Download<\/a><\/div>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<p><em>PLECS model<\/em><\/p>\n\n\n\n<div class=\"wp-block-file\"><a href=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SRF_DDSRF_PLECS.plecs\">SRF_DDSRF_PLECS<\/a><a href=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/SRF_DDSRF_PLECS.plecs\" class=\"wp-block-file__button\" download>Download<\/a><\/div>\n<\/div>\n<\/div>\n\n\n\n<p>The provided Simulink and PLECS model implements both the SRF-PLL and DDSRF-PLL using the&nbsp;<a href=\"https:\/\/imperix.com\/software\/acg-sdk\/\">ACG SDK<\/a>&nbsp;for simulation and code generation.<\/p>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<h4 class=\"wp-block-heading\">Simulink<\/h4>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"424\" height=\"373\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/Simulink-parameters.png\" alt=\"Simulink SRF-PLL parameters\" class=\"wp-image-29659\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/Simulink-parameters.png 424w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/Simulink-parameters-300x264.png 300w\" sizes=\"auto, (max-width: 424px) 100vw, 424px\" \/><figcaption>DDSRF-PLL Simulink block<\/figcaption><\/figure>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<h4 class=\"wp-block-heading\">PLECS<\/h4>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"440\" height=\"447\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/PLECS-parameters.png\" alt=\"PLECS SRF-PLL parameters\" class=\"wp-image-29660\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/PLECS-parameters.png 440w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/PLECS-parameters-295x300.png 295w\" sizes=\"auto, (max-width: 440px) 100vw, 440px\" \/><figcaption>DDSRF-PLL PLECS block<\/figcaption><\/figure>\n<\/div>\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Tuning-of-SRF-PLL\"><\/span>Tuning of SRF PLL<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<p>To complete the implementation of the SRF PLL, the PI controller gains have to be determined.&nbsp;This&nbsp;can be achieved&nbsp;by linearizing the control loop [4] and deriving the following transfer function.<\/p>\n\n\n\n<p>$$P(s) = \\frac{\\hat{\\theta}}{\\psi}(s) = \\frac{2\\zeta\\omega_c s + \\omega_c^2}{s^2+2\\zeta\\omega_c s + \\omega_c^2} \\quad \\quad \\text{with} \\quad \\quad K_p = 2\\zeta\\omega_c  \\quad \\text{ and } \\quad K_i = \\omega_c^2$$<\/p>\n\n\n\n<p>Where \\(\\psi\\) represents a phase disturbance, \\(\\hat{\\theta}\\) is the estimated phase, \\(\\zeta\\) is the damping factor, and \\(\\omega_c\\)\u200b is the PLL bandwidth. To achieve a good trade-off between settling time and overshoot, a commonly used damping factor is \\(\\zeta = \\frac{1}{\\sqrt{2}}\\)\u200b. On the other hand, the bandwidth parameter, \\(\\omega_c\\), determines the settling time of the PLL and its disturbance rejection capability. A higher \\(\\omega_c\\) results in a shorter settling time but increases sensitivity to disturbances. Therefore, \\(\\omega_c\\) should be chosen based on the quality of the grid voltage. A typical value for real grids is approximately \\(\\omega_c \\approx 2 \\pi 30\\) rad\/s. <\/p>\n\n\n\n<p>The figures below illustrate the impact of \\(\\omega_c\\) during a phase jump and when 5th harmonic distortion is present in the grid voltage.<\/p>\n\n\n\n<figure class=\"wp-block-image size-large is-resized\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/disturbance-1.png\" alt=\"SRF PLL tuning step response\" class=\"wp-image-29022\" width=\"780\" height=\"300\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/disturbance-1.png 780w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/disturbance-1-300x115.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/disturbance-1-768x295.png 768w\" sizes=\"auto, (max-width: 780px) 100vw, 780px\" \/><figcaption>Tuning effects of the SRF-PLL<\/figcaption><\/figure>\n\n\n\n<h4 class=\"wp-block-heading\">Experimental results<\/h4>\n\n\n\n<p>Experimental results and detailed comparisons with other PLLs are available on the <a href=\"https:\/\/imperix.com\/doc\/implementation\/grid-synchronization-methods\">Grid synchronization methods<\/a> page.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"ddsrf\"><span class=\"ez-toc-section\" id=\"Going-further-Double-Decoupled-Synchronous-Reference-Frame-DDSRF-PLL\"><\/span>Going further : Double Decoupled Synchronous Reference Frame (DDSRF) PLL<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>Thanks to its simplicity and performance under nominal conditions, the SRF-PLL has become the PLL of choice for applications where robustness against disturbances is not required. However, in the presence of unbalance in the grid voltage, an oscillating term at twice the fundamental frequency appears after the Park transform. The DDSRF-PLL effectively addresses this issue by using a decoupling network to separate the positive and negative sequence components, ensuring accurate detection even under unbalanced voltages. <\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Decoupling\"><\/span>Decoupling<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<p>The idea behind this decoupling is to generate a signal that mimics the parasitic signal at twice the fundamental frequency, using known parameters or those obtained through filtering. This generated signal is then subtracted from the main signal to achieve decoupling of the positive and negative sequence voltages. The mathematical development of this decoupling process is shown below.<\/p>\n\n\n<style>.kt-accordion-id_3ce2e7-33 .kt-accordion-inner-wrap{column-gap:var(--global-kb-gap-md, 2rem);row-gap:10px;}.kt-accordion-id_3ce2e7-33 .kt-accordion-panel-inner{border-top-width:0px;border-right-width:1px;border-bottom-width:1px;border-left-width:1px;background:#ffffff;padding-top:var(--global-kb-spacing-sm, 1.5rem);padding-right:var(--global-kb-spacing-sm, 1.5rem);padding-bottom:var(--global-kb-spacing-sm, 1.5rem);padding-left:var(--global-kb-spacing-sm, 1.5rem);}.kt-accordion-id_3ce2e7-33 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top-color:#eeeeee;border-right-color:#eeeeee;border-bottom-color:#eeeeee;border-left-color:#eeeeee;border-top-width:1px;border-right-width:1px;border-bottom-width:1px;border-left-width:2px;border-top-left-radius:0px;border-top-right-radius:0px;border-bottom-right-radius:0px;border-bottom-left-radius:0px;background:#ffffff;font-size:18px;line-height:24px;color:#444444;padding-top:14px;padding-right:16px;padding-bottom:14px;padding-left:16px;}.kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap .kt-blocks-accordion-icon-trigger:before{background:#444444;}.kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger{background:#444444;}.kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id_3ce2e7-33 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id_3ce2e7-33 .kt-blocks-accordion-header:focus-visible{color:#444444;background:#ffffff;border-top-color:#d4d4d4;border-right-color:#d4d4d4;border-bottom-color:#d4d4d4;border-left-color:#d4d4d4;}.kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion--visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#444444;}.kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger, body:not(.hide-focus-outline) .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger{background:#444444;}.kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id_3ce2e7-33 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id_3ce2e7-33 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{color:#444444;background:#ffffff;border-top-color:#eeeeee;border-right-color:#eeeeee;border-bottom-color:#eeeeee;border-left-color:#0e9cd1;}.kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:before{background:#444444;}.kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger{background:#444444;}.kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id_3ce2e7-33:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}@media all and (max-width: 767px){.kt-accordion-id_3ce2e7-33 .kt-accordion-inner-wrap{display:block;}.kt-accordion-id_3ce2e7-33 .kt-accordion-inner-wrap .kt-accordion-pane:not(:first-child){margin-top:10px;}}<\/style>\n<div class=\"wp-block-kadence-accordion alignnone\"><div class=\"kt-accordion-wrap kt-accordion-wrap kt-accordion-id_3ce2e7-33 kt-accordion-has-2-panes kt-active-pane-0 kt-accordion-block kt-pane-header-alignment-left kt-accodion-icon-style-arrow kt-accodion-icon-side-right\" style=\"max-width:none\"><div class=\"kt-accordion-inner-wrap\" data-allow-multiple-open=\"false\" data-start-open=\"0\">\n<div class=\"wp-block-kadence-pane kt-accordion-pane kt-accordion-pane-1 kt-pane_712cca-43\"><div class=\"kt-accordion-header-wrap\"><button class=\"kt-blocks-accordion-header kt-acccordion-button-label-show\"><span class=\"kt-blocks-accordion-title-wrap\"><span class=\"kt-blocks-accordion-title\">Mathematical development of the decoupling<\/span><\/span><span class=\"kt-blocks-accordion-icon-trigger\"><\/span><\/button><\/div><div class=\"kt-accordion-panel kt-accordion-panel-hidden\"><div class=\"kt-accordion-panel-inner\">\n<p>In the presence of unbalanced voltage, both positive and negative sequence components exist and phase voltages can be expressed as in the dq reference frame as follow.<br>$${V}_{dq^{+}} = V^{+}\\begin{bmatrix} cos(wt-\\theta&#8217;) \\\\ sin(wt-\\theta&#8217;) \\end{bmatrix} + V^{-} \\begin{bmatrix} cos(-wt-\\theta&#8217;+\\phi^{-}) \\\\ sin(-wt-\\theta&#8217;+\\phi^{-}) \\end{bmatrix} $$<\/p>\n\n\n\n<p>$$ {V}_{dq^{-}} = V^{+}\\begin{bmatrix} cos(wt+\\theta&#8217;) \\\\ sin(wt+\\theta&#8217;) \\end{bmatrix} + V^{-}\\begin{bmatrix} cos(-wt+\\theta&#8217;+\\phi^{-}) \\\\ sin(-wt+\\theta&#8217;+\\phi^{-}) \\end{bmatrix}$$<\/p>\n\n\n\n<p>With \\(V^{\\pm}\\) the positive and negative sequence voltage, \\(\\omega t\\) the real grid phase, \\(\\theta&#8217;\\) the estimated grid phase and \\(\\phi^{-}\\) the negative sequence phase offset. Assuming a reasonably well-parameterized PLL is used, it can be assumed that \\(wt \\approx \\theta&#8217;\\) resulting in the following voltages.<\/p>\n\n\n\n<p>$${V}_{dq^{+}} \\approx V^{+}\\begin{bmatrix}1\\\\ 0\\end{bmatrix} + V^{-} \\begin{bmatrix} cos(-2wt+\\phi^{-}) \\\\ sin(-2wt+\\phi^{-}) \\end{bmatrix} $$<\/p>\n\n\n\n<p>$${V}_{dq^{-}} \\approx V^{+}\\begin{bmatrix} cos(2wt) \\\\ sin(2wt) \\end{bmatrix} + V^{-} \\begin{bmatrix} cos(\\phi^{-}) \\\\ sin(\\phi^{-}) \\end{bmatrix} $$<\/p>\n\n\n\n<p>Indeed, the positive and negative sequences are coupled. To synchronize the PLL on \\(V_q^+\\) the oscillating term at \\(2\\omega\\) must be removed. This is achieved by reconstructing the perturbation signal using trigonometry and filtering the negative sequence voltage. The reconstructed signal is then subtracted from the positive sequence voltage to obtain a pure positive sequence voltage. The following equation illustrates the reconstruction of the parasitic signal using the estimated phase and the filtered negative sequence.<\/p>\n\n\n\n<p>$$V^{-}\\begin{bmatrix} cos(-2wt+\\phi^{-}) \\\\ sin(-2wt+\\phi^{-}) \\end{bmatrix} \\stackrel{\\theta&#8217;\\approx wt}{=}\\begin{bmatrix} \\overbrace{V^{-}cos(\\phi^{-})}^{\\overline{v_{d^{-}}&#8217;}}cos(2\\theta&#8217;) + \\overbrace{V^{-}sin(\\phi^{-})}^{\\overline{v_{q^{-}}&#8217;}}sin(2\\theta&#8217;) \\\\ -\\underbrace{V^{-}cos(\\phi^{-})}_{\\overline{v_{d^{-}}&#8217;}}sin(2\\theta&#8217;) + \\underbrace{V^{-}sin(\\phi^{-})}_{\\overline{v_{q^{-}}&#8217;}}cos(2\\theta&#8217;) \\end{bmatrix}$$<\/p>\n\n\n\n<p>The above \\(\\overline{v_{dq^{-}}&#8217;}\\) components are obtained by filtering the negative sequence voltage with a low-pass filter (LPF) whose cutoff frequency is \\(\\leq 2\\omega\\). [4] recommends using a first-order Butterworth filter with a cutoff frequency of \\(w_0 = \\frac{w}{\\sqrt{2}}\\).<\/p>\n\n\n\n<p>$$ LPF(V_{dq^{-}}) = \\overline{v_{dq^{-}}&#8217;} \\approx V^{-}\\begin{bmatrix} cos(\\phi^{-}) \\\\ sin(\\phi^{-}) \\end{bmatrix} $$<\/p>\n\n\n\n<p>Finally, the reconstructed signal is subtracted from the perturbed signal, allowing for effective decoupling of the sequences, as shown below.<\/p>\n\n\n\n<p>$${V}_{dq^{+}} \\approx V^{+}\\begin{bmatrix}1\\\\ 0\\end{bmatrix} + V^{-} \\begin{bmatrix} cos(-2wt+\\phi^{-}) \\\\ sin(-2wt+\\phi^{-}) \\end{bmatrix} &#8211; V^{-} \\begin{bmatrix} cos(-2\\theta&#8217;+\\phi^{-}) \\\\ sin(-2\\theta+\\phi^{-}) \\end{bmatrix} \\approx V^{+}\\begin{bmatrix}1\\\\ 0\\end{bmatrix}$$<\/p>\n<\/div><\/div><\/div>\n<\/div><\/div><\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Implementation-of-the-DDSRF-PLL\"><\/span>Implementation of the DDSRF-PLL<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<p>The algorithm for decoupling the positive and negative sequences is implemented as shown below. A decoupling network for both sequences is added after the Park transform ensuring that only the positive sequence is used in the SRF-PLL.<\/p>\n\n\n\n<figure class=\"wp-block-image size-large is-resized\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/DDSRF_PLL-2.png\" alt=\"\" class=\"wp-image-29418\" width=\"780\" height=\"379\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/DDSRF_PLL-2.png 780w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/DDSRF_PLL-2-300x146.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/DDSRF_PLL-2-768x373.png 768w\" sizes=\"auto, (max-width: 780px) 100vw, 780px\" \/><figcaption>Implementation of the DDSRF-PLL<\/figcaption><\/figure>\n\n\n\n<p>Where the \\(DC^x\\) blocks implement the mathematics developed above to achieve decoupled voltages in the dq reference frame. The complete implementation of the DDSRF-PLL on Simulink is shown below<\/p>\n\n\n\n<div class=\"wp-block-image\"><figure class=\"aligncenter size-large is-resized\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/DDSRF_Simulink-2.png\" alt=\"DDSRF-PLL simulink implementation\" class=\"wp-image-29673\" width=\"780\" height=\"332\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/DDSRF_Simulink-2.png 780w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/DDSRF_Simulink-2-300x128.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/05\/DDSRF_Simulink-2-768x327.png 768w\" sizes=\"auto, (max-width: 780px) 100vw, 780px\" \/><figcaption>DDSRF-PLL Simulink implementation<\/figcaption><\/figure><\/div>\n\n\n\n<p>The corresponding simulink file can be downloaded above, in the same file as the SRF-PLL. Experimental results and detailed comparisons with other PLLs are available on the <a href=\"https:\/\/imperix.com\/doc\/implementation\/grid-synchronization-methods\">Grid synchronization methods<\/a> page.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-academic-references\"><span class=\"ez-toc-section\" id=\"Academic-references\"><\/span>Academic references<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p><a href=\"https:\/\/ieeexplore.ieee.org\/document\/6020431\">[1]<\/a> M. Boyra and J. Thomas, \u201cA review on synchronization methods for grid-connected three-phase VSC under unbalanced and distorted conditions,\u201d in Proc. EPE Conf., Birmingham, 2011.<\/p>\n\n\n\n<p><a href=\"https:\/\/doi.org\/10.1109\/63.844502\">[2]<\/a> S.-K. Chung, \u201cA phase tracking system for three-phase utility interface inverters,\u201d IEEE Transactions on Power Electronics, vol. 15, no. 3, May 2000.<\/p>\n\n\n\n<p><a href=\"https:\/\/doi.org\/10.1109\/IAS.2001.955993\">[3]<\/a> L. Arruda and B. Silva, S.M.and Cardoso Filho, \u201cPLL structures for utility connected systems,\u201d in 2001 IEEE Industry Applications Society 36th Annual Meeting (IAS\u201901), Chicago, USA, Sep.\/Oct. 30\u20134, 2001<\/p>\n\n\n\n<p><a href=\"https:\/\/doi.org\/10.1109\/TPEL.2006.890000\">[4]<\/a> P. Rodriguez, J. Pou, J. Bergas, J. I. Candela, R. P. Burgos and D. Boroyevich, &#8220;Decoupled Double Synchronous Reference Frame PLL for Power Converters Control,&#8221; in&nbsp;IEEE Transactions on Power Electronics, vol. 22, no. 2,  March 2007.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-usecase-examples\"><span class=\"ez-toc-section\" id=\"Use-case-examples\"><\/span>Use case examples<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>As introduced above, phase-locked loops are used in most of today&#8217;s grid-tied power converters. Here are a few examples of such converters:<\/p>\n\n\n\n<ul class=\"wp-block-list\"><li><a href=\"https:\/\/imperix.com\/doc\/example\/three-phase-pv-inverter\">Three-phase PV inverter for grid-tied applications<\/a><\/li><li><a href=\"https:\/\/imperix.com\/doc\/example\/fast-electric-vehicle-charger\">Fast electric vehicle charger with intermediate energy storage<\/a><\/li><li><a href=\"https:\/\/imperix.com\/doc\/example\/multi-converters-system\">Multi-converter system for micro-grid<\/a><\/li><li><a href=\"https:\/\/imperix.com\/doc\/example\/mmc-converter\">Three-phase MMC converter<\/a><\/li><li><a href=\"https:\/\/imperix.com\/doc\/example\/solid-state-transformer\">Solid-state transformers<\/a><\/li><li><a href=\"https:\/\/imperix.com\/doc\/implementation\/cascaded-h-bridge-converter-control\">Cascaded H-bridge converter<\/a><\/li><li><a href=\"https:\/\/imperix.com\/doc\/example\/static-synchronous-compensator-statcom\">Static synchronous compensator (STATCOM)<\/a><\/li><\/ul>\n","protected":false},"excerpt":{"rendered":"<p>This note provides insights into the operating principle of a synchronous reference frame PLL (SRF PLL), also known as DQ-type PLL. An implementation of an&#8230;<\/p>\n","protected":false},"author":22,"featured_media":13279,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"_kad_post_classname":"","footnotes":""},"categories":[4],"tags":[],"software-environments":[103,104],"provided-results":[108],"related-products":[50,31,32,92,166,113,112,110],"guidedreadings":[],"tutorials":[],"user-manuals":[],"coauthors":[98,64],"class_list":["post-2621","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-implementation","software-environments-matlab","software-environments-plecs","provided-results-experimental","related-products-acg-sdk","related-products-b-board-pro","related-products-b-box-rcp","related-products-b-box-micro","related-products-b-box-rcp-3-0","related-products-mmc","related-products-peb","related-products-tpi"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.3 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Synchronous reference frame (SRF) PLL - imperix<\/title>\n<meta name=\"description\" content=\"This page discusses the operating principle of synchronous reference frame phase-locked loop. Imperix&#039;s implementation of SRF PLL is provided.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Synchronous reference frame (SRF) PLL - imperix\" \/>\n<meta property=\"og:description\" content=\"This page discusses the operating principle of synchronous reference frame phase-locked loop. Imperix&#039;s implementation of SRF PLL is provided.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll\" \/>\n<meta property=\"og:site_name\" content=\"imperix\" \/>\n<meta property=\"article:published_time\" content=\"2021-04-09T08:39:02+00:00\" \/>\n<meta property=\"article:modified_time\" content=\"2025-05-07T10:45:51+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/3_2_ratio_TN103.png\" \/>\n\t<meta property=\"og:image:width\" content=\"450\" \/>\n\t<meta property=\"og:image:height\" content=\"300\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/png\" \/>\n<meta name=\"author\" content=\"Antonin Stampbach, Jessy An\u00e7ay\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"Antonin Stampbach, Jessy An\u00e7ay\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"8 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll\"},\"author\":{\"name\":\"Antonin Stampbach\",\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/#\\\/schema\\\/person\\\/1338476cb17e45ff388f2d9915cb27f9\"},\"headline\":\"Synchronous reference frame (SRF) PLL\",\"datePublished\":\"2021-04-09T08:39:02+00:00\",\"dateModified\":\"2025-05-07T10:45:51+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll\"},\"wordCount\":1689,\"commentCount\":0,\"publisher\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/#organization\"},\"image\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/imperix.com\\\/doc\\\/wp-content\\\/uploads\\\/2021\\\/04\\\/3_2_ratio_TN103.png\",\"articleSection\":[\"Technical notes\"],\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"CommentAction\",\"name\":\"Comment\",\"target\":[\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll#respond\"]}]},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll\",\"url\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll\",\"name\":\"Synchronous reference frame (SRF) PLL - imperix\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll#primaryimage\"},\"image\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/imperix.com\\\/doc\\\/wp-content\\\/uploads\\\/2021\\\/04\\\/3_2_ratio_TN103.png\",\"datePublished\":\"2021-04-09T08:39:02+00:00\",\"dateModified\":\"2025-05-07T10:45:51+00:00\",\"description\":\"This page discusses the operating principle of synchronous reference frame phase-locked loop. Imperix's implementation of SRF PLL is provided.\",\"breadcrumb\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll#primaryimage\",\"url\":\"https:\\\/\\\/imperix.com\\\/doc\\\/wp-content\\\/uploads\\\/2021\\\/04\\\/3_2_ratio_TN103.png\",\"contentUrl\":\"https:\\\/\\\/imperix.com\\\/doc\\\/wp-content\\\/uploads\\\/2021\\\/04\\\/3_2_ratio_TN103.png\",\"width\":450,\"height\":300},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/implementation\\\/synchronous-reference-frame-pll#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Knowledge base\",\"item\":\"https:\\\/\\\/imperix.com\\\/doc\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Technical notes\",\"item\":\"https:\\\/\\\/imperix.com\\\/doc\\\/category\\\/implementation\"},{\"@type\":\"ListItem\",\"position\":3,\"name\":\"Synchronous reference frame (SRF) PLL\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/#website\",\"url\":\"https:\\\/\\\/imperix.com\\\/doc\\\/\",\"name\":\"imperix\",\"description\":\"power electronics\",\"publisher\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/imperix.com\\\/doc\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"},{\"@type\":\"Organization\",\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/#organization\",\"name\":\"imperix\",\"url\":\"https:\\\/\\\/imperix.com\\\/doc\\\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/#\\\/schema\\\/logo\\\/image\\\/\",\"url\":\"https:\\\/\\\/imperix.com\\\/doc\\\/wp-content\\\/uploads\\\/2021\\\/03\\\/imperix_logo.png\",\"contentUrl\":\"https:\\\/\\\/imperix.com\\\/doc\\\/wp-content\\\/uploads\\\/2021\\\/03\\\/imperix_logo.png\",\"width\":350,\"height\":120,\"caption\":\"imperix\"},\"image\":{\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/#\\\/schema\\\/logo\\\/image\\\/\"}},{\"@type\":\"Person\",\"@id\":\"https:\\\/\\\/imperix.com\\\/doc\\\/#\\\/schema\\\/person\\\/1338476cb17e45ff388f2d9915cb27f9\",\"name\":\"Antonin Stampbach\",\"image\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/7d8f93c1670fdefaa99799c00f0c32d11f451231460aa951bbd0c5b7377748df?s=96&d=mm&r=g7aa81252baa6af2f21d9ab24227e4a4c\",\"url\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/7d8f93c1670fdefaa99799c00f0c32d11f451231460aa951bbd0c5b7377748df?s=96&d=mm&r=g\",\"contentUrl\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/7d8f93c1670fdefaa99799c00f0c32d11f451231460aa951bbd0c5b7377748df?s=96&d=mm&r=g\",\"caption\":\"Antonin Stampbach\"},\"description\":\"Antonin is a development engineer at Imperix. On the knowledge base, he is the author of numerous articles on the control and operation of grid-connected inverters.\",\"sameAs\":[\"https:\\\/\\\/www.linkedin.com\\\/in\\\/antonin-stampbach-a75a87205\"],\"url\":\"https:\\\/\\\/imperix.com\\\/doc\\\/author\\\/stampbach\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"Synchronous reference frame (SRF) PLL - imperix","description":"This page discusses the operating principle of synchronous reference frame phase-locked loop. Imperix's implementation of SRF PLL is provided.","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll","og_locale":"en_US","og_type":"article","og_title":"Synchronous reference frame (SRF) PLL - imperix","og_description":"This page discusses the operating principle of synchronous reference frame phase-locked loop. Imperix's implementation of SRF PLL is provided.","og_url":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll","og_site_name":"imperix","article_published_time":"2021-04-09T08:39:02+00:00","article_modified_time":"2025-05-07T10:45:51+00:00","og_image":[{"width":450,"height":300,"url":"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/3_2_ratio_TN103.png","type":"image\/png"}],"author":"Antonin Stampbach, Jessy An\u00e7ay","twitter_card":"summary_large_image","twitter_misc":{"Written by":"Antonin Stampbach, Jessy An\u00e7ay","Est. reading time":"8 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll#article","isPartOf":{"@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll"},"author":{"name":"Antonin Stampbach","@id":"https:\/\/imperix.com\/doc\/#\/schema\/person\/1338476cb17e45ff388f2d9915cb27f9"},"headline":"Synchronous reference frame (SRF) PLL","datePublished":"2021-04-09T08:39:02+00:00","dateModified":"2025-05-07T10:45:51+00:00","mainEntityOfPage":{"@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll"},"wordCount":1689,"commentCount":0,"publisher":{"@id":"https:\/\/imperix.com\/doc\/#organization"},"image":{"@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll#primaryimage"},"thumbnailUrl":"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/3_2_ratio_TN103.png","articleSection":["Technical notes"],"inLanguage":"en-US","potentialAction":[{"@type":"CommentAction","name":"Comment","target":["https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll#respond"]}]},{"@type":"WebPage","@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll","url":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll","name":"Synchronous reference frame (SRF) PLL - imperix","isPartOf":{"@id":"https:\/\/imperix.com\/doc\/#website"},"primaryImageOfPage":{"@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll#primaryimage"},"image":{"@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll#primaryimage"},"thumbnailUrl":"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/3_2_ratio_TN103.png","datePublished":"2021-04-09T08:39:02+00:00","dateModified":"2025-05-07T10:45:51+00:00","description":"This page discusses the operating principle of synchronous reference frame phase-locked loop. Imperix's implementation of SRF PLL is provided.","breadcrumb":{"@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll"]}]},{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll#primaryimage","url":"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/3_2_ratio_TN103.png","contentUrl":"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/04\/3_2_ratio_TN103.png","width":450,"height":300},{"@type":"BreadcrumbList","@id":"https:\/\/imperix.com\/doc\/implementation\/synchronous-reference-frame-pll#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Knowledge base","item":"https:\/\/imperix.com\/doc\/"},{"@type":"ListItem","position":2,"name":"Technical notes","item":"https:\/\/imperix.com\/doc\/category\/implementation"},{"@type":"ListItem","position":3,"name":"Synchronous reference frame (SRF) PLL"}]},{"@type":"WebSite","@id":"https:\/\/imperix.com\/doc\/#website","url":"https:\/\/imperix.com\/doc\/","name":"imperix","description":"power electronics","publisher":{"@id":"https:\/\/imperix.com\/doc\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/imperix.com\/doc\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Organization","@id":"https:\/\/imperix.com\/doc\/#organization","name":"imperix","url":"https:\/\/imperix.com\/doc\/","logo":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/imperix.com\/doc\/#\/schema\/logo\/image\/","url":"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/03\/imperix_logo.png","contentUrl":"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/03\/imperix_logo.png","width":350,"height":120,"caption":"imperix"},"image":{"@id":"https:\/\/imperix.com\/doc\/#\/schema\/logo\/image\/"}},{"@type":"Person","@id":"https:\/\/imperix.com\/doc\/#\/schema\/person\/1338476cb17e45ff388f2d9915cb27f9","name":"Antonin Stampbach","image":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/secure.gravatar.com\/avatar\/7d8f93c1670fdefaa99799c00f0c32d11f451231460aa951bbd0c5b7377748df?s=96&d=mm&r=g7aa81252baa6af2f21d9ab24227e4a4c","url":"https:\/\/secure.gravatar.com\/avatar\/7d8f93c1670fdefaa99799c00f0c32d11f451231460aa951bbd0c5b7377748df?s=96&d=mm&r=g","contentUrl":"https:\/\/secure.gravatar.com\/avatar\/7d8f93c1670fdefaa99799c00f0c32d11f451231460aa951bbd0c5b7377748df?s=96&d=mm&r=g","caption":"Antonin Stampbach"},"description":"Antonin is a development engineer at Imperix. On the knowledge base, he is the author of numerous articles on the control and operation of grid-connected inverters.","sameAs":["https:\/\/www.linkedin.com\/in\/antonin-stampbach-a75a87205"],"url":"https:\/\/imperix.com\/doc\/author\/stampbach"}]}},"_links":{"self":[{"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/posts\/2621","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/users\/22"}],"replies":[{"embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/comments?post=2621"}],"version-history":[{"count":162,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/posts\/2621\/revisions"}],"predecessor-version":[{"id":29996,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/posts\/2621\/revisions\/29996"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/media\/13279"}],"wp:attachment":[{"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/media?parent=2621"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/categories?post=2621"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/tags?post=2621"},{"taxonomy":"software-environments","embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/software-environments?post=2621"},{"taxonomy":"provided-results","embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/provided-results?post=2621"},{"taxonomy":"related-products","embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/related-products?post=2621"},{"taxonomy":"guidedreadings","embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/guidedreadings?post=2621"},{"taxonomy":"tutorials","embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/tutorials?post=2621"},{"taxonomy":"user-manuals","embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/user-manuals?post=2621"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/imperix.com\/doc\/wp-json\/wp\/v2\/coauthors?post=2621"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}