{"id":6242,"date":"2021-08-24T14:40:38","date_gmt":"2021-08-24T14:40:38","guid":{"rendered":"https:\/\/imperix.com\/doc\/?p=6242"},"modified":"2025-05-07T13:50:26","modified_gmt":"2025-05-07T13:50:26","slug":"fpga-based-delta-sigma-modulator","status":"publish","type":"post","link":"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator","title":{"rendered":"FPGA-based decoder for a Delta-Sigma modulator"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_82_2 ez-toc-wrap-right-text counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator\/#Introduction\" >Introduction<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator\/#Related-notes\" >Related notes<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator\/#Software-sources\" >Software sources<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator\/#Delta-sigma-decoder-implementation\" >Delta-sigma decoder implementation<\/a><ul class='ez-toc-list-level-3' ><li class='ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator\/#Synchronous-decoder-for-NRZ-encoding\" >Synchronous decoder for NRZ encoding<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-3'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator\/#Manchester-decoder\" >Manchester decoder<\/a><\/li><\/ul><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator\/#Delta-sigma-modulator-testbench\" >Delta-sigma modulator testbench<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator\/#Deployment-on-the-B-Board-PRO\" >Deployment on the B-Board PRO<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-delta-sigma-modulator\/#Experimental-results\" >Experimental results<\/a><\/li><\/ul><\/nav><\/div>\n\n<p>This technical note shows how to build a decoder IP for a Delta-Sigma Modulator and establish communication with such a device through USR ports of the <a href=\"https:\/\/imperix.com\/products\/control\/rapid-prototyping-controller\/\">B-Box RCP<\/a> and <a href=\"https:\/\/imperix.com\/products\/control\/inverter-control-board\/\">B-Board PRO<\/a>. The corresponding approach uses the user-programmable area inside the FPGA, also known as <em>sandbox<\/em>.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-introduction\"><span class=\"ez-toc-section\" id=\"Introduction\"><\/span>Introduction<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>Delta-Sigma Modulators are a class of analog-to-digital converters (ADCs) that produce a high-frequency data stream (1-bit), whose pulse density represents the acquired analog value. In data acquisition applications, such devices are particularly useful when only a few (typ. 1-2) digital lines are available. This may notably be essential when data must be carried across a galvanic isolation barrier, such as in numerous power electronic applications.<\/p>\n\n\n\n<p><a href=\"https:\/\/en.wikipedia.org\/wiki\/Delta-sigma_modulation\">Delta-sigma modulation<\/a> may represent various modulation techniques, resulting in different types of data encoding methods for the digital stream. Common types are <a href=\"https:\/\/en.wikipedia.org\/wiki\/Non-return-to-zero\">Non-Return-to-Zero<\/a> (NRZ) and <a href=\"https:\/\/en.wikipedia.org\/wiki\/Manchester_code\">Manchester coding<\/a>. These techniques differ in their bitrates, but may also offer (or not) the possibility of recovering the clock from the bit stream.<\/p>\n\n\n\n<p>Clock recovery is often an essential feature. Indeed, by recovering the data clock directly from the stream itself, a separate clock becomes dispensable, which further reduces the number of required communication lines. In practice, a delta-sigma modulator can communicate with its associated demodulator with <strong>only one digital line<\/strong>! <\/p>\n\n\n\n<p>This note provides an implementation example centered around the <a href=\"https:\/\/www.ti.com\/lit\/ds\/symlink\/amc1035.pdf?ts=1629991870512&amp;ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FAMC1035\">AMC1035<\/a> delta-sigma modulator, which supports two output encoding methods: Non-Return-to-Zero (NRZ) and Manchester coding. The data rate of NRZ coding is 9~21MHz while the data rate of Manchester coding is 9~11MHz. In the next chapter, a decoder for each coding method will be provided. <\/p>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-related-notes\"><span class=\"ez-toc-section\" id=\"Related-notes\"><\/span>Related notes<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Instructions on how to build an FPGA project template and how to exchange data between the CPU and the sandbox using the AXI4-Stream interface\u00a0module can be found in <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-fpga-control-development\">Getting started with FPGA control development<\/a>.<\/li>\n\n\n\n<li>The page  <a href=\"https:\/\/imperix.com\/doc\/implementation\/axi4-stream-ip-from-xilinx\">AXI4-Stream IP from Xilinx<\/a> presents the AXI4-Stream interface and the Xilinx AXI4-Stream IPs.<\/li>\n\n\n\n<li>Another example of how to expand the number of ADC inputs using SPI and user ports is available in <a href=\"https:\/\/imperix.com\/doc\/implementation\/fpga-based-spi-communication-ip\">FPGA-based SPI communication IP for ADC<\/a>.<\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-software-sources\"><span class=\"ez-toc-section\" id=\"Software-sources\"><\/span>Software sources<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<div class=\"wp-block-file\"><a href=\"https:\/\/cdn.imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC1035.zip\">AMC1035<\/a><a href=\"https:\/\/cdn.imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC1035.zip\" class=\"wp-block-file__button wp-element-button\" download>Download<\/a><\/div>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-delta-sigma-decoder-implementation\"><span class=\"ez-toc-section\" id=\"Delta-sigma-decoder-implementation\"><\/span>Delta-sigma decoder implementation<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-synchronous-decoder-for-nrz-encoding\"><span class=\"ez-toc-section\" id=\"Synchronous-decoder-for-NRZ-encoding\"><\/span>Synchronous decoder for NRZ encoding<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<p>In synchronous mode, the clock signal is generated by the FPGA, transmitted to the delta-sigma modulator, and used by the latter for the modulation. The same clock is then used for decoding the NRZ bit stream that is received by the FPGA. This approach uses two physical USR ports available from the <em>sandbox<\/em> and one three-order <a href=\"https:\/\/en.wikipedia.org\/wiki\/Sinc_filter\">sinc filter<\/a> as a decimator.<\/p>\n\n\n\n<p>In general, the suggested system diagram for a synchronous decoder is shown below.<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"618\" height=\"161\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/TN149_synchronous.png\" alt=\"System diagram using a synchronous decoder\" class=\"wp-image-30779\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/TN149_synchronous.png 618w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/TN149_synchronous-300x78.png 300w\" sizes=\"auto, (max-width: 618px) 100vw, 618px\" \/><figcaption class=\"wp-element-caption\">System diagram using a synchronous decoder<\/figcaption><\/figure>\n<\/div>\n\n\n<p>The VHDL codes are given below.<\/p>\n\n\n<style>.kt-accordion-id6242_356506-e2 .kt-accordion-inner-wrap{column-gap:var(--global-kb-gap-md, 2rem);row-gap:1px;}.kt-accordion-id6242_356506-e2 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;border-top-left-radius:2px;border-top-right-radius:2px;border-bottom-right-radius:2px;border-bottom-left-radius:2px;background:#ffffff;padding-top:20px;padding-right:20px;padding-bottom:20px;padding-left:20px;}.kt-accordion-id6242_356506-e2 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid 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.kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id6242_356506-e2 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id6242_356506-e2 .kt-blocks-accordion-header:focus-visible{color:#444444;background:#ffffff;border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion--visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#444444;}.kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger, body:not(.hide-focus-outline) .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger{background:#444444;}.kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id6242_356506-e2 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id6242_356506-e2 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{color:var(--global-palette3, #1A202C);background:var(--global-palette9, #ffffff);border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}.kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_356506-e2:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette9, #ffffff);}@media all and (max-width: 1024px){.kt-accordion-id6242_356506-e2 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}}@media all and (max-width: 1024px){.kt-accordion-id6242_356506-e2 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}}@media all and (max-width: 1024px){.kt-accordion-id6242_356506-e2 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id6242_356506-e2 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}}@media all and (max-width: 1024px){.kt-accordion-id6242_356506-e2 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id6242_356506-e2 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}@media all and (max-width: 767px){.kt-accordion-id6242_356506-e2 .kt-accordion-inner-wrap{display:block;}.kt-accordion-id6242_356506-e2 .kt-accordion-inner-wrap .kt-accordion-pane:not(:first-child){margin-top:1px;}.kt-accordion-id6242_356506-e2 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}.kt-accordion-id6242_356506-e2 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}.kt-accordion-id6242_356506-e2 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id6242_356506-e2 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id6242_356506-e2 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id6242_356506-e2 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}<\/style>\n<div class=\"wp-block-kadence-accordion alignnone\"><div class=\"kt-accordion-wrap kt-accordion-id6242_356506-e2 kt-accordion-has-5-panes kt-active-pane-0 kt-accordion-block kt-pane-header-alignment-left kt-accodion-icon-style-arrow kt-accodion-icon-side-left\" style=\"max-width:none\"><div class=\"kt-accordion-inner-wrap\" data-allow-multiple-open=\"false\" data-start-open=\"none\">\n<div class=\"wp-block-kadence-pane kt-accordion-pane kt-accordion-pane-1 kt-pane6242_b1b1d5-6a\"><div class=\"kt-accordion-header-wrap\"><button class=\"kt-blocks-accordion-header kt-acccordion-button-label-show\"><span class=\"kt-blocks-accordion-title-wrap\"><span class=\"kt-blocks-accordion-title\"><strong>AMC1035 driver using synchronous clock<\/strong><\/span><\/span><span class=\"kt-blocks-accordion-icon-trigger\"><\/span><\/button><\/div><div class=\"kt-accordion-panel kt-accordion-panel-hidden\"><div class=\"kt-accordion-panel-inner\"><pre class=\"wp-block-code\" aria-describedby=\"shcb-language-1\" data-shcb-language-name=\"VHDL\" data-shcb-language-slug=\"vhdl\"><span><code class=\"hljs language-vhdl\"><span class=\"hljs-keyword\">library<\/span> IEEE;\n<span class=\"hljs-keyword\">use<\/span> IEEE.STD_LOGIC_1164.<span class=\"hljs-keyword\">ALL<\/span>;\n<span class=\"hljs-keyword\">use<\/span> IEEE.std_logic_unsigned.<span class=\"hljs-keyword\">all<\/span>;\n<span class=\"hljs-keyword\">use<\/span> IEEE.NUMERIC_STD.<span class=\"hljs-keyword\">ALL<\/span>;\n\n<span class=\"hljs-keyword\">entity<\/span> amc_driver <span class=\"hljs-keyword\">is<\/span>\n\t<span class=\"hljs-keyword\">port<\/span>(   \n\t<span class=\"hljs-comment\">-- Configuration from CPU<\/span>\n        AMC_M : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>); <span class=\"hljs-comment\">-- Decimation ratio<\/span>\n        \n\t<span class=\"hljs-comment\">-- Input from AMC1035:<\/span>\n        DATA_IN : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;  <span class=\"hljs-comment\">-- Input bit stream<\/span>\n        CLK  : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>; <span class=\"hljs-comment\">-- AMC clock input<\/span>\n        \n        <span class=\"hljs-comment\">-- sinc3 filter output using AXI4-Stream (Non-blocking)<\/span>\n        M_AXIS_DATA_tdata : <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>);\n        M_AXIS_DATA_tvalid : <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;\n        \n        <span class=\"hljs-comment\">-- Active low reset<\/span>\n        RESN : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>\n\t);\n<span class=\"hljs-keyword\">end<\/span> amc_driver;\n\n<span class=\"hljs-keyword\">architecture<\/span> rtl <span class=\"hljs-keyword\">of<\/span> amc_driver <span class=\"hljs-keyword\">is<\/span>\n    \n    <span class=\"hljs-keyword\">ATTRIBUTE<\/span> X_INTERFACE_INFO : <span class=\"hljs-built_in\">STRING<\/span>;\n    <span class=\"hljs-keyword\">ATTRIBUTE<\/span> X_INTERFACE_INFO <span class=\"hljs-keyword\">of<\/span> CLK: <span class=\"hljs-keyword\">SIGNAL<\/span> <span class=\"hljs-keyword\">is<\/span> <span class=\"hljs-string\">\"xilinx.com:signal:clock:1.0 clk CLK\"<\/span>;\n\t\n    <span class=\"hljs-comment\">-- Divided CLK : f_CNR = f_CLK\/M<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> CNR : <span class=\"hljs-built_in\">std_logic<\/span> := <span class=\"hljs-string\">'0'<\/span>;\n    \n    <span class=\"hljs-comment\">-- Intermediate signals of sinc3 filter<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> DN0, DN1, DN3, DN5 : <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>); \n    <span class=\"hljs-keyword\">signal<\/span> CN1, CN2, CN3, CN4, CN5 : <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>); \n    <span class=\"hljs-keyword\">signal<\/span> DELTA1 : <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>);\n\t\n<span class=\"hljs-keyword\">begin<\/span>\n\n    <span class=\"hljs-comment\">-- Generate divided CLK <\/span>\n    P_CNR : <span class=\"hljs-keyword\">process<\/span>(CLK)\n        <span class=\"hljs-keyword\">variable<\/span> CNR_cnt: <span class=\"hljs-built_in\">unsigned<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>):=(<span class=\"hljs-keyword\">others<\/span>=&gt;<span class=\"hljs-string\">'0'<\/span>);\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">if<\/span> rising_edge(CLK) <span class=\"hljs-keyword\">then<\/span>\n           M_AXIS_DATA_tvalid &lt;= <span class=\"hljs-string\">'0'<\/span>; <span class=\"hljs-comment\">-- Default<\/span>\n           <span class=\"hljs-comment\">-- Toggle CNR<\/span>\n           <span class=\"hljs-keyword\">if<\/span> CNR_cnt+<span class=\"hljs-number\">1<\/span> &gt;= <span class=\"hljs-built_in\">unsigned<\/span>(<span class=\"hljs-string\">'0'<\/span> &amp; AMC_M(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">1<\/span>)) <span class=\"hljs-keyword\">then<\/span>\n               CNR_cnt := (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>);\n               CNR &lt;= <span class=\"hljs-keyword\">not<\/span> CNR;\n               <span class=\"hljs-keyword\">if<\/span> CNR = <span class=\"hljs-string\">'0'<\/span> <span class=\"hljs-keyword\">then<\/span>\n                   M_AXIS_DATA_tvalid &lt;= <span class=\"hljs-string\">'1'<\/span>; <span class=\"hljs-comment\">-- Data is valid at each CNR rising edge<\/span>\n               <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n           <span class=\"hljs-keyword\">else<\/span>\n               CNR_cnt := CNR_cnt + <span class=\"hljs-number\">1<\/span>;\n           <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n        <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> P_CNR;\n    \n    <span class=\"hljs-comment\">-- sinc3 filter input<\/span>\n    <span class=\"hljs-keyword\">process<\/span>(CLK, RESN) \n     <span class=\"hljs-keyword\">begin<\/span> \n         <span class=\"hljs-keyword\">if<\/span> RESN = <span class=\"hljs-string\">'0'<\/span> <span class=\"hljs-keyword\">then<\/span> \n            DELTA1 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n         <span class=\"hljs-keyword\">elsif<\/span> CLK<span class=\"hljs-symbol\">'event<\/span> <span class=\"hljs-keyword\">and<\/span> CLK = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span> \n            <span class=\"hljs-keyword\">if<\/span> DATA_IN = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span> \n                DELTA1 &lt;= DELTA1 + <span class=\"hljs-number\">1<\/span>; \n            <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>; \n         <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>; \n     <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span>;\n     \n     <span class=\"hljs-comment\">-- Integral<\/span>\n     <span class=\"hljs-keyword\">process<\/span>(RESN, CLK) \n     <span class=\"hljs-keyword\">begin<\/span> \n         <span class=\"hljs-keyword\">if<\/span> RESN = <span class=\"hljs-string\">'0'<\/span> <span class=\"hljs-keyword\">then<\/span> \n            CN1 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n            CN2 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n         <span class=\"hljs-keyword\">elsif<\/span> CLK<span class=\"hljs-symbol\">'event<\/span> <span class=\"hljs-keyword\">and<\/span> CLK = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span> \n            CN1 &lt;= CN1 + DELTA1; \n            CN2 &lt;= CN2 + CN1; \n         <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>; \n     <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span>;\n     \n     <span class=\"hljs-comment\">-- Comb<\/span>\n     <span class=\"hljs-keyword\">process<\/span>(RESN, CNR) \n     <span class=\"hljs-keyword\">begin<\/span> \n        <span class=\"hljs-keyword\">if<\/span> RESN = <span class=\"hljs-string\">'0'<\/span> <span class=\"hljs-keyword\">then<\/span> \n            DN0 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n            DN1 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n            DN3 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n            DN5 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n        <span class=\"hljs-keyword\">elsif<\/span> CNR<span class=\"hljs-symbol\">'event<\/span> <span class=\"hljs-keyword\">and<\/span> CNR = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span> \n            DN0 &lt;= CN2; \n            DN1 &lt;= DN0; \n            DN3 &lt;= CN3; \n            DN5 &lt;= CN4; \n        <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>; \n     <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span>;\n     \n     CN3 &lt;= DN0 - DN1; \n     CN4 &lt;= CN3 - DN3; \n     CN5 &lt;= CN4 - DN5;\n     M_AXIS_DATA_tdata &lt;= CN5;\n\n<span class=\"hljs-keyword\">end<\/span> rtl;\n\n<\/code><\/span><small class=\"shcb-language\" id=\"shcb-language-1\"><span class=\"shcb-language__label\">Code language:<\/span> <span class=\"shcb-language__name\">VHDL<\/span> <span class=\"shcb-language__paren\">(<\/span><span class=\"shcb-language__slug\">vhdl<\/span><span class=\"shcb-language__paren\">)<\/span><\/small><\/pre><\/div><\/div><\/div>\n<\/div><\/div><\/div>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The AMC1035 sends a NRZ (Non-Return-to-Zero) coded bit stream<\/li>\n\n\n\n<li>The clock is generated by the FPGA and fed to the AMC1035 and decoder block, synchronously<\/li>\n\n\n\n<li>The decimation ratio M can be configured from the CPU using an <a href=\"https:\/\/imperix.com\/doc\/software\/sandbox-output-towards-fpga\">SBO register<\/a><\/li>\n\n\n\n<li>The output data is a 32-bit unsigned integer available on an AXI4-Stream interface<\/li>\n<\/ul>\n\n\n\n<p>The sinc<sup>3<\/sup> filter is implemented using CIC (<a href=\"https:\/\/en.wikipedia.org\/wiki\/Cascaded_integrator-comb_filter\">Cascaded integrator\u2013comb filter<\/a>) architecture as shown below. CIC is an efficient implementation of a moving-average filter, which is built using adders and registers only. The relationship between the decimation ratio M and the output data width is given in the table below.<\/p>\n\n\n\n<div class=\"wp-block-columns is-layout-flex wp-container-core-columns-is-layout-9d6595d7 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:50%\">\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"883\" height=\"570\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/xilinx_sinc3_impl.png\" alt=\"\" class=\"wp-image-6464\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/xilinx_sinc3_impl.png 883w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/xilinx_sinc3_impl-300x194.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/xilinx_sinc3_impl-768x496.png 768w\" sizes=\"auto, (max-width: 883px) 100vw, 883px\" \/><figcaption class=\"wp-element-caption\">Xilinx sinc<sup>3<\/sup> filter implementation (taken from <a href=\"https:\/\/www.ti.com\/lit\/an\/sbaa094\/sbaa094.pdf?ts=1627980251600\">TI document<\/a>)<\/figcaption><\/figure>\n<\/div>\n\n\n\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\" style=\"flex-basis:50%\">\n<figure class=\"wp-block-table alignfull is-style-stripes\"><table><tbody><tr><td>Decimation<\/td><td>Date Rate (kHz)<\/td><td>Gain<sub>DC<\/sub> (bits)<\/td><td>Total Output Width (bits)<\/td><\/tr><tr><td>4<\/td><td>2500<\/td><td>6<\/td><td>7<\/td><\/tr><tr><td>8<\/td><td>1250<\/td><td>9<\/td><td>10<\/td><\/tr><tr><td>16<\/td><td>625<\/td><td>12<\/td><td>13<\/td><\/tr><tr><td>32<\/td><td>312.5<\/td><td>15<\/td><td>16<\/td><\/tr><tr><td>64<\/td><td>156.2<\/td><td>18<\/td><td>19<\/td><\/tr><\/tbody><\/table><figcaption class=\"wp-element-caption\">Summary of the sin<sup>3<\/sup> filter for 10MHz samping clock<\/figcaption><\/figure>\n<\/div>\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-manchester-decoder\"><span class=\"ez-toc-section\" id=\"Manchester-decoder\"><\/span>Manchester decoder<span class=\"ez-toc-section-end\"><\/span><\/h3>\n\n\n\n<p>In Manchester coding mode, the AMC1035 can be clocked with a local clock, whose phase and frequency are unknown. On the FPGA side, this approach needs only one user port, for receiving the data stream, and one three-order sinc filter as decimator. In addition, a Manchester decoder is needed to translate Manchester-encoded data to NRZ. This mode has the advantage of reducing the number of used user ports but the drawback of a reduced data rate (down to 9~11MHz).<\/p>\n\n\n\n<p>In general, the suggested system diagram using the Manchester decoder is shown below. <\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"688\" height=\"171\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/TN149_manchester.png\" alt=\"System diagram using a manchester decoder\" class=\"wp-image-30780\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/TN149_manchester.png 688w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/TN149_manchester-300x75.png 300w\" sizes=\"auto, (max-width: 688px) 100vw, 688px\" \/><figcaption class=\"wp-element-caption\">System diagram using Manchester decoder<\/figcaption><\/figure>\n\n\n\n<p>The VHDL codes are given below.<\/p>\n\n\n<style>.kt-accordion-id6242_fa1150-42 .kt-accordion-inner-wrap{column-gap:var(--global-kb-gap-md, 2rem);row-gap:1px;}.kt-accordion-id6242_fa1150-42 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;border-top-left-radius:2px;border-top-right-radius:2px;border-bottom-right-radius:2px;border-bottom-left-radius:2px;background:#ffffff;padding-top:20px;padding-right:20px;padding-bottom:20px;padding-left:20px;}.kt-accordion-id6242_fa1150-42 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;border-top-left-radius:2px;border-top-right-radius:2px;border-bottom-right-radius:2px;border-bottom-left-radius:2px;background:#ffffff;font-size:16px;line-height:24px;letter-spacing:0px;font-weight:bold;text-transform:none;color:var(--global-palette3, #1A202C);padding-top:12px;padding-right:10px;padding-bottom:8px;padding-left:16px;}.kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id6242_fa1150-42 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id6242_fa1150-42 .kt-blocks-accordion-header:focus-visible{color:#444444;background:#ffffff;border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion--visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#444444;}.kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger, body:not(.hide-focus-outline) .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger{background:#444444;}.kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id6242_fa1150-42 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id6242_fa1150-42 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{color:var(--global-palette3, #1A202C);background:var(--global-palette9, #ffffff);border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}.kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_fa1150-42:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active 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.kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}}@media all and (max-width: 1024px){.kt-accordion-id6242_fa1150-42 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id6242_fa1150-42 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}}@media all and (max-width: 1024px){.kt-accordion-id6242_fa1150-42 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id6242_fa1150-42 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}@media all and (max-width: 767px){.kt-accordion-id6242_fa1150-42 .kt-accordion-inner-wrap{display:block;}.kt-accordion-id6242_fa1150-42 .kt-accordion-inner-wrap .kt-accordion-pane:not(:first-child){margin-top:1px;}.kt-accordion-id6242_fa1150-42 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}.kt-accordion-id6242_fa1150-42 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}.kt-accordion-id6242_fa1150-42 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id6242_fa1150-42 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id6242_fa1150-42 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id6242_fa1150-42 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}<\/style>\n<div class=\"wp-block-kadence-accordion alignnone\"><div class=\"kt-accordion-wrap kt-accordion-id6242_fa1150-42 kt-accordion-has-3-panes kt-active-pane-0 kt-accordion-block kt-pane-header-alignment-left kt-accodion-icon-style-arrow kt-accodion-icon-side-left\" style=\"max-width:none\"><div class=\"kt-accordion-inner-wrap\" data-allow-multiple-open=\"false\" data-start-open=\"none\">\n<div class=\"wp-block-kadence-pane kt-accordion-pane kt-accordion-pane-1 kt-pane6242_3d0f34-44\"><div class=\"kt-accordion-header-wrap\"><button class=\"kt-blocks-accordion-header kt-acccordion-button-label-show\"><span class=\"kt-blocks-accordion-title-wrap\"><span class=\"kt-blocks-accordion-title\"><strong>AMC1035 driver using Manchester decoding<\/strong><\/span><\/span><span class=\"kt-blocks-accordion-icon-trigger\"><\/span><\/button><\/div><div class=\"kt-accordion-panel kt-accordion-panel-hidden\"><div class=\"kt-accordion-panel-inner\"><pre class=\"wp-block-code\" aria-describedby=\"shcb-language-2\" data-shcb-language-name=\"VHDL\" data-shcb-language-slug=\"vhdl\"><span><code class=\"hljs language-vhdl\"><span class=\"hljs-keyword\">library<\/span> IEEE;\n<span class=\"hljs-keyword\">use<\/span> IEEE.STD_LOGIC_1164.<span class=\"hljs-keyword\">ALL<\/span>;\n<span class=\"hljs-keyword\">use<\/span> IEEE.std_logic_unsigned.<span class=\"hljs-keyword\">all<\/span>;\n<span class=\"hljs-keyword\">use<\/span> IEEE.NUMERIC_STD.<span class=\"hljs-keyword\">ALL<\/span>;\n\n<span class=\"hljs-keyword\">entity<\/span> amc_driver_md <span class=\"hljs-keyword\">is<\/span>\n\t<span class=\"hljs-keyword\">port<\/span>(\n\t<span class=\"hljs-comment\">-- Configuration from CPU<\/span>\n        AMC_M: <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>); <span class=\"hljs-comment\">-- Decimation ratio<\/span>\n        \n\t<span class=\"hljs-comment\">-- Input data from delta-sigma modulator<\/span>\n        DATA_IN  : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;  <span class=\"hljs-comment\">-- AMC DATA input<\/span>\n        \n        <span class=\"hljs-comment\">-- sinc3 filter output using AXI4-Stream (Non-blocking)<\/span>\n        M_AXIS_DATA_tdata : <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>);\n        M_AXIS_DATA_tvalid : <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;\n        \n        <span class=\"hljs-comment\">-- Decoder clock<\/span>\n\tCLK : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;\n\t\t\n\t<span class=\"hljs-comment\">-- Active low reset<\/span>\n\tRESN : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>\n\t);\n<span class=\"hljs-keyword\">end<\/span> amc_driver_md;\n\n<span class=\"hljs-keyword\">architecture<\/span> rtl <span class=\"hljs-keyword\">of<\/span> amc_driver_md <span class=\"hljs-keyword\">is<\/span>\n\n    <span class=\"hljs-keyword\">ATTRIBUTE<\/span> X_INTERFACE_INFO : <span class=\"hljs-built_in\">STRING<\/span>;\n    <span class=\"hljs-keyword\">ATTRIBUTE<\/span> X_INTERFACE_INFO <span class=\"hljs-keyword\">of<\/span> CLK: <span class=\"hljs-keyword\">SIGNAL<\/span> <span class=\"hljs-keyword\">is<\/span> <span class=\"hljs-string\">\"xilinx.com:signal:clock:1.0 clk CLK\"<\/span>;\n    \n    <span class=\"hljs-comment\">-- Intermediate signals of Manchester decoder<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> Q0, Q1, Q2, Q3, Q4 : <span class=\"hljs-built_in\">std_logic<\/span> := <span class=\"hljs-string\">'0'<\/span>;\n    <span class=\"hljs-keyword\">signal<\/span> INV_1, INV_2, XOR2, OR2_1, AND2B1, AND2, OR2_2, AND3B2 : <span class=\"hljs-built_in\">std_logic<\/span> := <span class=\"hljs-string\">'0'<\/span>;\n    \n    <span class=\"hljs-comment\">-- Manchester decoder output<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> DATA_MD : <span class=\"hljs-built_in\">std_logic<\/span>; <span class=\"hljs-comment\">-- Output data<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> STROBE : <span class=\"hljs-built_in\">std_logic<\/span>;  <span class=\"hljs-comment\">-- Output data valid<\/span>\n    \n    <span class=\"hljs-comment\">-- Divided AMC_CLK : f_CNR = f_CLK\/M<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> CNR_rising_edge : <span class=\"hljs-built_in\">std_logic<\/span>;\n    <span class=\"hljs-keyword\">signal<\/span> CNR_cnt : <span class=\"hljs-built_in\">unsigned<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>) := (<span class=\"hljs-keyword\">others<\/span>=&gt;<span class=\"hljs-string\">'0'<\/span>);\n     \n    <span class=\"hljs-comment\">-- Intermediate signals of sinc3 filter<\/span>\n    <span class=\"hljs-keyword\">signal<\/span> DN0, DN1, DN3, DN5 : <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>); \n    <span class=\"hljs-keyword\">signal<\/span> CN1, CN2, CN3, CN4, CN5 : <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>); \n    <span class=\"hljs-keyword\">signal<\/span> DELTA1 : <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>);\n\n<span class=\"hljs-keyword\">begin<\/span>\n \n    <span class=\"hljs-comment\">-- Manchester decoder<\/span>\n    DATA_MD &lt;= INV_2; <span class=\"hljs-comment\">-- 0: falling 1: rising<\/span>\n    INV_1 &lt;= <span class=\"hljs-keyword\">not<\/span> Q0;\n    INV_2 &lt;= <span class=\"hljs-keyword\">not<\/span> Q1;\n    XOR2 &lt;= Q0 <span class=\"hljs-keyword\">xor<\/span> INV_2;\n    OR2_1 &lt;= XOR2 <span class=\"hljs-keyword\">or<\/span> Q2;\n    AND2B1 &lt;= OR2_1 <span class=\"hljs-keyword\">and<\/span> (<span class=\"hljs-keyword\">not<\/span> Q4);\n    AND2 &lt;= Q3 <span class=\"hljs-keyword\">and<\/span> OR2_2;\n    OR2_2 &lt;= Q2 <span class=\"hljs-keyword\">or<\/span> Q4;\n    AND3B2 &lt;= (<span class=\"hljs-keyword\">not<\/span> Q2) <span class=\"hljs-keyword\">and<\/span> (<span class=\"hljs-keyword\">not<\/span> Q4) <span class=\"hljs-keyword\">and<\/span> XOR2;\n    \n    P_MD : <span class=\"hljs-keyword\">process<\/span>(CLK)\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">if<\/span> rising_edge(CLK) <span class=\"hljs-keyword\">then<\/span>\n            Q0 &lt;= DATA_IN;\n            Q1 &lt;= INV_1;\n            Q2 &lt;= AND2B1;\n            Q3 &lt;= Q2;\n            Q4 &lt;= AND2;\n            STROBE &lt;= AND3B2;\n        <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> P_MD;\n    \n    <span class=\"hljs-comment\">-- Generate CNR<\/span>\n     P_CNR : <span class=\"hljs-keyword\">process<\/span>(CLK, RESN)\n     <span class=\"hljs-keyword\">begin<\/span>\n         <span class=\"hljs-keyword\">if<\/span> RESN = <span class=\"hljs-string\">'0'<\/span> <span class=\"hljs-keyword\">then<\/span>\n             CNR_cnt &lt;= (<span class=\"hljs-keyword\">others<\/span>=&gt;<span class=\"hljs-string\">'0'<\/span>);\n         <span class=\"hljs-keyword\">elsif<\/span> rising_edge(CLK) <span class=\"hljs-keyword\">then<\/span>\n             CNR_rising_edge &lt;= <span class=\"hljs-string\">'0'<\/span>;\n             <span class=\"hljs-keyword\">if<\/span> STROBE = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span> <span class=\"hljs-comment\">-- Data is valid<\/span>\n                 <span class=\"hljs-comment\">-- Toggle postscaled_CNR<\/span>\n                 <span class=\"hljs-keyword\">if<\/span> CNR_cnt+<span class=\"hljs-number\">1<\/span> &gt;= <span class=\"hljs-built_in\">unsigned<\/span>(AMC_M) <span class=\"hljs-keyword\">then<\/span>\n                     CNR_rising_edge &lt;= <span class=\"hljs-string\">'1'<\/span>;\n                     CNR_cnt &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>);\n                 <span class=\"hljs-keyword\">else<\/span>\n                     CNR_cnt &lt;= CNR_cnt + <span class=\"hljs-number\">1<\/span>;\n                 <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n             <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n         <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n     <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> P_CNR;\n     \n     <span class=\"hljs-comment\">-- sinc3 filter<\/span>\n     P_SINC3 : <span class=\"hljs-keyword\">process<\/span>(CLK, RESN)\n     <span class=\"hljs-keyword\">begin<\/span>\n         <span class=\"hljs-keyword\">if<\/span> RESN = <span class=\"hljs-string\">'0'<\/span> <span class=\"hljs-keyword\">then<\/span> \n             DELTA1 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>);\n             CN1 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n             CN2 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>);\n             DN0 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n             DN1 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n             DN3 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>); \n             DN5 &lt;= (<span class=\"hljs-keyword\">others<\/span> =&gt; <span class=\"hljs-string\">'0'<\/span>);\n         <span class=\"hljs-keyword\">elsif<\/span> rising_edge(CLK) <span class=\"hljs-keyword\">then<\/span>\n             M_AXIS_DATA_tvalid &lt;= <span class=\"hljs-string\">'0'<\/span>; <span class=\"hljs-comment\">-- Default<\/span>\n             <span class=\"hljs-comment\">-- Integral<\/span>\n             <span class=\"hljs-keyword\">if<\/span> STROBE = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span> <span class=\"hljs-comment\">-- Data is valid<\/span>\n                 <span class=\"hljs-keyword\">if<\/span> DATA_MD = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span> \n                     DELTA1 &lt;= DELTA1 + <span class=\"hljs-number\">1<\/span>; \n                 <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n                 CN1 &lt;= CN1 + DELTA1; \n                 CN2 &lt;= CN2 + CN1;\n             <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n             <span class=\"hljs-comment\">-- Comb<\/span>\n             <span class=\"hljs-keyword\">if<\/span> CNR_rising_edge = <span class=\"hljs-string\">'1'<\/span> <span class=\"hljs-keyword\">then<\/span>\n                 M_AXIS_DATA_tvalid &lt;= <span class=\"hljs-string\">'1'<\/span>;\n                 DN0 &lt;= CN2; \n                 DN1 &lt;= DN0; \n                 DN3 &lt;= CN3; \n                 DN5 &lt;= CN4;\n             <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n         <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">if<\/span>;\n     <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> P_SINC3;\n     \n     CN3 &lt;= DN0 - DN1; \n     CN4 &lt;= CN3 - DN3; \n     CN5 &lt;= CN4 - DN5;\n     M_AXIS_DATA_tdata &lt;= CN5;\n    \n<span class=\"hljs-keyword\">end<\/span> rtl;\n<\/code><\/span><small class=\"shcb-language\" id=\"shcb-language-2\"><span class=\"shcb-language__label\">Code language:<\/span> <span class=\"shcb-language__name\">VHDL<\/span> <span class=\"shcb-language__paren\">(<\/span><span class=\"shcb-language__slug\">vhdl<\/span><span class=\"shcb-language__paren\">)<\/span><\/small><\/pre><\/div><\/div><\/div>\n<\/div><\/div><\/div>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The AMC1035 works in the Manchester coding mode<\/li>\n\n\n\n<li>The clock used by the Manchester decoder can be asynchronous to the input data, but must be between 5 and 12 times, nominally 8 times, faster than the input data rate. For the AMC1035 we can simply use a 80MHz clock<\/li>\n\n\n\n<li>The decimation ratio M can be configured by the CPU using an <a href=\"https:\/\/imperix.com\/doc\/software\/sandbox-output-towards-fpga\">SBO register<\/a><\/li>\n\n\n\n<li>The output data is a 32-bit unsigned integer using AXI4-Stream interface<\/li>\n<\/ul>\n\n\n\n<p>This FPGA implementation of a Manchester decoder uses two registers and a XOR gate for transition detect, and one divide-by-six Johnson counter that locks up in the 000 state. Once a transition is detected, the <code>STROBE<\/code> flag will be asserted, indicating valid data, then the 6-counter will terminate <code>STROBE<\/code> for the following 5 periods. This procedure ensures that no between-bit transition is detected by mistake.<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"831\" height=\"248\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/03\/manchester_decoder_detail.png\" alt=\"\" class=\"wp-image-25641\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/03\/manchester_decoder_detail.png 831w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/03\/manchester_decoder_detail-300x90.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2024\/03\/manchester_decoder_detail-768x229.png 768w\" sizes=\"auto, (max-width: 831px) 100vw, 831px\" \/><figcaption class=\"wp-element-caption\">Manchester decoder circuit (taken from <a href=\"https:\/\/www.mikrocontroller.net\/attachment\/62628\/Manchester_Decoder_FPGA.pdf\">Manchester decoder in 3 CLBs<\/a>)<\/figcaption><\/figure>\n<\/div>\n\n\n<p>The implementation of sinc<sup>3<\/sup> filter uses the previously introduced CIC architecture. However, due to the different data-valid mechanism, the sinc<sup>3<\/sup> filter only accepts input data when <code>STROBE<\/code> is asserted, whereas in the previous design, it accepts data at each rising edge of the synchronous clock.<\/p>\n\n\n\n<div class=\"wp-block-simple-alerts-for-gutenberg-alert-boxes sab-alert sab-alert-warning\" role=\"alert\">Both blocks have the same name <code>CLK<\/code> for the clock input. They shall however NOT be confused.<br>For the synchronous decoder block, the <code>CLK<\/code> is the clock used by the AMC1035 running at 9~21MHz.<br>For the Manchester decoder block, the CLK is a specialized clock for Manchester decoding, running at 80MHz.<br>The reason why the same name is used for both clocks is that the AXI4-Stream interface is used to simplify the connection between blocks. And any clock used by the AXI4-Stream must be named according to Xilinx conventions. Otherwise, a clock cannot be automatically recognized.<\/div>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-delta-sigma-modulator-testbench\"><span class=\"ez-toc-section\" id=\"Delta-sigma-modulator-testbench\"><\/span>Delta-sigma modulator testbench<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>For each block, a VHDL testbench simulating NRZ\/Manchester coded bit streams is provided to validate the behavior of the two decoders.<\/p>\n\n\n<style>.kt-accordion-id6242_052305-f5 .kt-accordion-inner-wrap{column-gap:var(--global-kb-gap-md, 2rem);row-gap:1px;}.kt-accordion-id6242_052305-f5 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;border-top-left-radius:2px;border-top-right-radius:2px;border-bottom-right-radius:2px;border-bottom-left-radius:2px;background:#ffffff;padding-top:20px;padding-right:20px;padding-bottom:20px;padding-left:20px;}.kt-accordion-id6242_052305-f5 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;border-top-left-radius:2px;border-top-right-radius:2px;border-bottom-right-radius:2px;border-bottom-left-radius:2px;background:#ffffff;font-size:16px;line-height:24px;letter-spacing:0px;font-weight:bold;text-transform:none;color:var(--global-palette3, #1A202C);padding-top:12px;padding-right:10px;padding-bottom:8px;padding-left:16px;}.kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id6242_052305-f5 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id6242_052305-f5 .kt-blocks-accordion-header:focus-visible{color:#444444;background:#ffffff;border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion--visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle ) .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#444444;}.kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger, body:not(.hide-focus-outline) .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger{background:#444444;}.kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:hover .kt-blocks-accordion-icon-trigger:before, body:not(.hide-focus-outline) .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:after, body:not(.hide-focus-outline) .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible .kt-blocks-accordion-icon-trigger:before{background:#ffffff;}.kt-accordion-id6242_052305-f5 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id6242_052305-f5 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{color:var(--global-palette3, #1A202C);background:var(--global-palette9, #ffffff);border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}.kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basiccircle ):not( .kt-accodion-icon-style-xclosecircle ):not( .kt-accodion-icon-style-arrowcircle )  > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger{background:var(--global-palette3, #1A202C);}.kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:after, .kt-accordion-id6242_052305-f5:not( .kt-accodion-icon-style-basic ):not( .kt-accodion-icon-style-xclose ):not( .kt-accodion-icon-style-arrow ) .kt-blocks-accordion-header.kt-accordion-panel-active .kt-blocks-accordion-icon-trigger:before{background:var(--global-palette9, #ffffff);}@media all and (max-width: 1024px){.kt-accordion-id6242_052305-f5 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}}@media all and (max-width: 1024px){.kt-accordion-id6242_052305-f5 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}}@media all and (max-width: 1024px){.kt-accordion-id6242_052305-f5 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id6242_052305-f5 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}}@media all and (max-width: 1024px){.kt-accordion-id6242_052305-f5 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id6242_052305-f5 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}@media all and (max-width: 767px){.kt-accordion-id6242_052305-f5 .kt-accordion-inner-wrap{display:block;}.kt-accordion-id6242_052305-f5 .kt-accordion-inner-wrap .kt-accordion-pane:not(:first-child){margin-top:1px;}.kt-accordion-id6242_052305-f5 .kt-accordion-panel-inner{border-top:2px solid transparent;border-right:2px solid transparent;border-bottom:2px solid transparent;border-left:2px solid transparent;}.kt-accordion-id6242_052305-f5 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header{border-top:2px solid #f2f2f2;border-right:2px solid #f2f2f2;border-bottom:2px solid #f2f2f2;border-left:2px solid #f2f2f2;}.kt-accordion-id6242_052305-f5 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header:hover, \n\t\t\t\tbody:not(.hide-focus-outline) .kt-accordion-id6242_052305-f5 .kt-blocks-accordion-header:focus-visible{border-top:2px solid #eeeeee;border-right:2px solid #eeeeee;border-bottom:2px solid #eeeeee;border-left:2px solid #eeeeee;}.kt-accordion-id6242_052305-f5 .kt-accordion-header-wrap .kt-blocks-accordion-header:focus-visible,\n\t\t\t\t.kt-accordion-id6242_052305-f5 > .kt-accordion-inner-wrap > .wp-block-kadence-pane > .kt-accordion-header-wrap > .kt-blocks-accordion-header.kt-accordion-panel-active{border-top:2px solid var(--global-palette6, #718096);border-right:2px solid var(--global-palette6, #718096);border-bottom:2px solid var(--global-palette6, #718096);border-left:2px solid var(--global-palette6, #718096);}}<\/style>\n<div class=\"wp-block-kadence-accordion alignnone\"><div class=\"kt-accordion-wrap kt-accordion-id6242_052305-f5 kt-accordion-has-4-panes kt-active-pane-0 kt-accordion-block kt-pane-header-alignment-left kt-accodion-icon-style-arrow kt-accodion-icon-side-left\" style=\"max-width:none\"><div class=\"kt-accordion-inner-wrap\" data-allow-multiple-open=\"false\" data-start-open=\"none\">\n<div class=\"wp-block-kadence-pane kt-accordion-pane kt-accordion-pane-1 kt-pane6242_ac1cb2-76\"><div class=\"kt-accordion-header-wrap\"><button class=\"kt-blocks-accordion-header kt-acccordion-button-label-show\"><span class=\"kt-blocks-accordion-title-wrap\"><span class=\"kt-blocks-accordion-title\"><strong>Testbench for AMC1035 driver using synchronous clock<\/strong><\/span><\/span><span class=\"kt-blocks-accordion-icon-trigger\"><\/span><\/button><\/div><div class=\"kt-accordion-panel kt-accordion-panel-hidden\"><div class=\"kt-accordion-panel-inner\"><pre class=\"wp-block-code\" aria-describedby=\"shcb-language-3\" data-shcb-language-name=\"VHDL\" data-shcb-language-slug=\"vhdl\"><span><code class=\"hljs language-vhdl\"><span class=\"hljs-keyword\">library<\/span> IEEE;\n<span class=\"hljs-keyword\">use<\/span> IEEE.STD_LOGIC_1164.<span class=\"hljs-keyword\">ALL<\/span>;\n<span class=\"hljs-keyword\">use<\/span> IEEE.NUMERIC_STD.<span class=\"hljs-keyword\">ALL<\/span>;\n\n<span class=\"hljs-keyword\">entity<\/span> AMC_driver_tb <span class=\"hljs-keyword\">is<\/span>\n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">entity<\/span> AMC_driver_tb;\n\n<span class=\"hljs-keyword\">architecture<\/span> rtl <span class=\"hljs-keyword\">of<\/span> AMC_driver_tb <span class=\"hljs-keyword\">is<\/span>\n\n<span class=\"hljs-keyword\">constant<\/span> MCLK_PERIOD : <span class=\"hljs-built_in\">time<\/span> := <span class=\"hljs-number\">100<\/span>ns; <span class=\"hljs-comment\">-- DSM CLK<\/span>\n<span class=\"hljs-keyword\">constant<\/span> MCLK_LOW    : <span class=\"hljs-built_in\">time<\/span> := MCLK_PERIOD \/ <span class=\"hljs-number\">2<\/span>;\n<span class=\"hljs-keyword\">constant<\/span> MCLK_HIGH   : <span class=\"hljs-built_in\">time<\/span> := MCLK_PERIOD \/ <span class=\"hljs-number\">2<\/span>;\n<span class=\"hljs-keyword\">signal<\/span> mclk : <span class=\"hljs-built_in\">std_logic<\/span>;\n\n<span class=\"hljs-keyword\">signal<\/span> RESN : <span class=\"hljs-built_in\">std_logic<\/span>;\n\n<span class=\"hljs-keyword\">signal<\/span> DATA_IN : <span class=\"hljs-built_in\">std_logic<\/span>;\n<span class=\"hljs-keyword\">signal<\/span> M : <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>) := <span class=\"hljs-built_in\">std_logic_vector<\/span>(to_unsigned(<span class=\"hljs-number\">8<\/span>, <span class=\"hljs-number\">16<\/span>)); <span class=\"hljs-comment\">-- Decimation ratio<\/span>\n\n<span class=\"hljs-keyword\">component<\/span> amc_driver <span class=\"hljs-keyword\">is<\/span>\n\t<span class=\"hljs-keyword\">port<\/span>(   \n\t<span class=\"hljs-comment\">-- Configuration from CPU<\/span>\n        AMC_M : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>); <span class=\"hljs-comment\">-- Decimation ratio<\/span>\n        \n\t<span class=\"hljs-comment\">-- Input from AMC1035:<\/span>\n        DATA_IN : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;  <span class=\"hljs-comment\">-- Input bit stream<\/span>\n        CLK  : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>; <span class=\"hljs-comment\">-- AMC clock input<\/span>\n        \n        <span class=\"hljs-comment\">-- sinc3 filter output using AXI4-Stream (Non-blocking)<\/span>\n        M_AXIS_DATA_tdata : <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>);\n        M_AXIS_DATA_tvalid : <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;\n        \n        <span class=\"hljs-comment\">-- Active low reset<\/span>\n        RESN : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>\n\t);\n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">component<\/span> amc_driver;\n\n<span class=\"hljs-comment\">-- input NRZ coded '0'<\/span>\n<span class=\"hljs-keyword\">procedure<\/span> input_0 (<span class=\"hljs-keyword\">signal<\/span> DATA_IN : <span class=\"hljs-keyword\">inout<\/span> <span class=\"hljs-built_in\">std_logic<\/span>) <span class=\"hljs-keyword\">is<\/span>\n<span class=\"hljs-keyword\">begin<\/span>\n    <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">until<\/span> rising_edge(mclk);\n    DATA_IN &lt;= <span class=\"hljs-string\">'0'<\/span>;\n    <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> MCLK_PERIOD;\n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">procedure<\/span> input_0;\n\n<span class=\"hljs-comment\">-- input NRZ coded '1'<\/span>\n<span class=\"hljs-keyword\">procedure<\/span> input_1 (<span class=\"hljs-keyword\">signal<\/span> DATA_IN : <span class=\"hljs-keyword\">inout<\/span> <span class=\"hljs-built_in\">std_logic<\/span>) <span class=\"hljs-keyword\">is<\/span>\n<span class=\"hljs-keyword\">begin<\/span>\n    <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">until<\/span> rising_edge(mclk);\n    DATA_IN &lt;= <span class=\"hljs-string\">'1'<\/span>;\n    <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> MCLK_PERIOD;\n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">procedure<\/span> input_1;\n\n<span class=\"hljs-keyword\">begin<\/span>\n    dut: amc_driver\n    <span class=\"hljs-keyword\">port<\/span> <span class=\"hljs-keyword\">map<\/span> (\n        AMC_M =&gt; M,\n        DATA_IN =&gt; DATA_IN,\n        CLK  =&gt; mclk,\n        M_AXIS_DATA_tdata =&gt; <span class=\"hljs-keyword\">open<\/span>,\n        M_AXIS_DATA_tvalid =&gt; <span class=\"hljs-keyword\">open<\/span>,\n        RESN =&gt; RESN\n    );\n\n    <span class=\"hljs-comment\">-- Reset process<\/span>\n    p_reset : <span class=\"hljs-keyword\">process<\/span> <span class=\"hljs-keyword\">is<\/span>\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">until<\/span> falling_edge(mclk);\n        RESN &lt;= <span class=\"hljs-string\">'0'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> <span class=\"hljs-number\">3<\/span>*MCLK_PERIOD;\n        RESN &lt;= <span class=\"hljs-string\">'1'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span>;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> p_reset;\n    \n    <span class=\"hljs-comment\">-- MCLOCK process<\/span>\n    p_mclk: <span class=\"hljs-keyword\">process<\/span> <span class=\"hljs-keyword\">is<\/span>\n    <span class=\"hljs-keyword\">begin<\/span>\n        mclk &lt;= <span class=\"hljs-string\">'0'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> <span class=\"hljs-number\">0.4<\/span> * MCLK_LOW;\n        mclk &lt;= <span class=\"hljs-string\">'1'<\/span>;\n        <span class=\"hljs-keyword\">WAIT<\/span> <span class=\"hljs-keyword\">FOR<\/span> MCLK_HIGH;\n        mclk &lt;= <span class=\"hljs-string\">'0'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> <span class=\"hljs-number\">0.6<\/span> * MCLK_LOW;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> p_mclk;\n    \n    <span class=\"hljs-comment\">-- Test process<\/span>\n    p_test : <span class=\"hljs-keyword\">process<\/span> <span class=\"hljs-keyword\">is<\/span>\n    <span class=\"hljs-keyword\">begin<\/span>\n    \n        <span class=\"hljs-comment\">-- input \"1001\"<\/span>\n        input_1(DATA_IN);\n        input_0(DATA_IN);\n        input_0(DATA_IN);\n        input_1(DATA_IN);\n        \n<span class=\"hljs-comment\">--        -- input \"1000\"<\/span>\n<span class=\"hljs-comment\">--        input_1(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_0(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_0(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_0(DATA_IN);<\/span>\n        \n<span class=\"hljs-comment\">--        -- input \"1110\"<\/span>\n<span class=\"hljs-comment\">--        input_1(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_1(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_1(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_0(DATA_IN);<\/span>\n        \n        <span class=\"hljs-comment\">-- Add more input patterns<\/span>\n\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> p_test;\n    \n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">architecture<\/span> rtl;\n<\/code><\/span><small class=\"shcb-language\" id=\"shcb-language-3\"><span class=\"shcb-language__label\">Code language:<\/span> <span class=\"shcb-language__name\">VHDL<\/span> <span class=\"shcb-language__paren\">(<\/span><span class=\"shcb-language__slug\">vhdl<\/span><span class=\"shcb-language__paren\">)<\/span><\/small><\/pre><\/div><\/div><\/div>\n\n\n\n<div class=\"wp-block-kadence-pane kt-accordion-pane kt-accordion-pane-4 kt-pane6242_853340-02\"><div class=\"kt-accordion-header-wrap\"><button class=\"kt-blocks-accordion-header kt-acccordion-button-label-show\"><span class=\"kt-blocks-accordion-title-wrap\"><span class=\"kt-blocks-accordion-title\"><strong>Testbench for AMC1035 driver <strong>using Manchester decoding<\/strong><\/strong><\/span><\/span><span class=\"kt-blocks-accordion-icon-trigger\"><\/span><\/button><\/div><div class=\"kt-accordion-panel kt-accordion-panel-hidden\"><div class=\"kt-accordion-panel-inner\"><pre class=\"wp-block-code\" aria-describedby=\"shcb-language-4\" data-shcb-language-name=\"VHDL\" data-shcb-language-slug=\"vhdl\"><span><code class=\"hljs language-vhdl\"><span class=\"hljs-keyword\">library<\/span> IEEE;\n<span class=\"hljs-keyword\">use<\/span> IEEE.STD_LOGIC_1164.<span class=\"hljs-keyword\">ALL<\/span>;\n<span class=\"hljs-keyword\">use<\/span> IEEE.NUMERIC_STD.<span class=\"hljs-keyword\">ALL<\/span>;\n\n<span class=\"hljs-keyword\">entity<\/span> AMC_driver_md_tb <span class=\"hljs-keyword\">is<\/span>\n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">entity<\/span> AMC_driver_md_tb;\n\n<span class=\"hljs-keyword\">architecture<\/span> rtl <span class=\"hljs-keyword\">of<\/span> AMC_driver_md_tb <span class=\"hljs-keyword\">is<\/span>\n\n<span class=\"hljs-keyword\">constant<\/span> CLK_PERIOD : <span class=\"hljs-built_in\">time<\/span> := <span class=\"hljs-number\">12.5<\/span>ns; <span class=\"hljs-comment\">-- Decoder CLK<\/span>\n<span class=\"hljs-keyword\">constant<\/span> CLK_LOW    : <span class=\"hljs-built_in\">time<\/span> := CLK_PERIOD \/ <span class=\"hljs-number\">2<\/span>;\n<span class=\"hljs-keyword\">constant<\/span> CLK_HIGH   : <span class=\"hljs-built_in\">time<\/span> := CLK_PERIOD \/ <span class=\"hljs-number\">2<\/span>;\n<span class=\"hljs-keyword\">signal<\/span> clk : <span class=\"hljs-built_in\">std_logic<\/span>;\n\n<span class=\"hljs-keyword\">constant<\/span> MCLK_PERIOD : <span class=\"hljs-built_in\">time<\/span> := <span class=\"hljs-number\">100<\/span>ns; <span class=\"hljs-comment\">-- DSM CLK<\/span>\n<span class=\"hljs-keyword\">constant<\/span> MCLK_LOW    : <span class=\"hljs-built_in\">time<\/span> := MCLK_PERIOD \/ <span class=\"hljs-number\">2<\/span>;\n<span class=\"hljs-keyword\">constant<\/span> MCLK_HIGH   : <span class=\"hljs-built_in\">time<\/span> := MCLK_PERIOD \/ <span class=\"hljs-number\">2<\/span>;\n<span class=\"hljs-keyword\">signal<\/span> mclk : <span class=\"hljs-built_in\">std_logic<\/span>;\n\n<span class=\"hljs-keyword\">signal<\/span> RESN : <span class=\"hljs-built_in\">std_logic<\/span>;\n\n<span class=\"hljs-keyword\">signal<\/span> DATA_IN : <span class=\"hljs-built_in\">std_logic<\/span>;\n<span class=\"hljs-keyword\">signal<\/span> M : <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>) := <span class=\"hljs-built_in\">std_logic_vector<\/span>(to_unsigned(<span class=\"hljs-number\">8<\/span>, <span class=\"hljs-number\">16<\/span>)); <span class=\"hljs-comment\">-- Decimation ratio<\/span>\n\n<span class=\"hljs-keyword\">component<\/span> amc_driver_md <span class=\"hljs-keyword\">is<\/span>\n\t<span class=\"hljs-keyword\">port<\/span>(\n\t<span class=\"hljs-comment\">-- Configuration from CPU<\/span>\n        AMC_M: <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">15<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>); <span class=\"hljs-comment\">-- Decimation ratio<\/span>\n        \n\t<span class=\"hljs-comment\">-- Input data from delta-sigma modulator<\/span>\n        DATA_IN  : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;  <span class=\"hljs-comment\">-- AMC DATA input<\/span>\n        \n        <span class=\"hljs-comment\">-- sinc3 filter output using AXI4-Stream (Non-blocking)<\/span>\n        M_AXIS_DATA_tdata : <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic_vector<\/span>(<span class=\"hljs-number\">31<\/span> <span class=\"hljs-keyword\">downto<\/span> <span class=\"hljs-number\">0<\/span>);\n        M_AXIS_DATA_tvalid : <span class=\"hljs-keyword\">out<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;\n        \n        <span class=\"hljs-comment\">-- Decoder clock<\/span>\n\tCLK : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>;\n\t\t\n\t<span class=\"hljs-comment\">-- Active low reset<\/span>\n\tRESN : <span class=\"hljs-keyword\">in<\/span> <span class=\"hljs-built_in\">std_logic<\/span>\n\t);\n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">component<\/span> amc_driver_md;\n\n<span class=\"hljs-comment\">-- input Manchester coded '0'<\/span>\n<span class=\"hljs-keyword\">procedure<\/span> input_0 (<span class=\"hljs-keyword\">signal<\/span> DATA_IN : <span class=\"hljs-keyword\">inout<\/span> <span class=\"hljs-built_in\">std_logic<\/span>) <span class=\"hljs-keyword\">is<\/span>\n<span class=\"hljs-keyword\">begin<\/span>\n    <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">until<\/span> rising_edge(mclk);\n    DATA_IN &lt;= <span class=\"hljs-string\">'1'<\/span>;\n    <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">until<\/span> falling_edge(mclk);\n    DATA_IN &lt;= <span class=\"hljs-string\">'0'<\/span>;\n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">procedure<\/span> input_0;\n\n<span class=\"hljs-comment\">-- input Manchester coded '1'<\/span>\n<span class=\"hljs-keyword\">procedure<\/span> input_1 (<span class=\"hljs-keyword\">signal<\/span> DATA_IN : <span class=\"hljs-keyword\">inout<\/span> <span class=\"hljs-built_in\">std_logic<\/span>) <span class=\"hljs-keyword\">is<\/span>\n<span class=\"hljs-keyword\">begin<\/span>\n    <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">until<\/span> rising_edge(mclk);\n    DATA_IN &lt;= <span class=\"hljs-string\">'0'<\/span>;\n    <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">until<\/span> falling_edge(mclk);\n    DATA_IN &lt;= <span class=\"hljs-string\">'1'<\/span>;\n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">procedure<\/span> input_1;\n\n<span class=\"hljs-keyword\">begin<\/span>\n    dut: amc_driver_md\n    <span class=\"hljs-keyword\">port<\/span> <span class=\"hljs-keyword\">map<\/span> (\n        AMC_M =&gt; M,\n        DATA_IN =&gt; DATA_IN,\n        M_AXIS_DATA_tdata =&gt; <span class=\"hljs-keyword\">open<\/span>,\n        M_AXIS_DATA_tvalid =&gt; <span class=\"hljs-keyword\">open<\/span>,\n\t\tCLK =&gt; clk,\n\t\tRESN =&gt; RESN\n    );\n\n    <span class=\"hljs-comment\">-- Reset process<\/span>\n    p_reset : <span class=\"hljs-keyword\">process<\/span> <span class=\"hljs-keyword\">is<\/span>\n    <span class=\"hljs-keyword\">begin<\/span>\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">until<\/span> falling_edge(clk);\n        RESN &lt;= <span class=\"hljs-string\">'0'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> <span class=\"hljs-number\">3<\/span>*CLK_PERIOD;\n        RESN &lt;= <span class=\"hljs-string\">'1'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span>;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> p_reset;\n    \n    <span class=\"hljs-comment\">-- Decoder CLOCK process<\/span>\n    p_clk: <span class=\"hljs-keyword\">process<\/span> <span class=\"hljs-keyword\">is<\/span>\n    <span class=\"hljs-keyword\">begin<\/span>\n        clk &lt;= <span class=\"hljs-string\">'0'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> CLK_LOW;\n        clk &lt;= <span class=\"hljs-string\">'1'<\/span>;\n        <span class=\"hljs-keyword\">WAIT<\/span> <span class=\"hljs-keyword\">FOR<\/span> CLK_HIGH;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> p_clk;\n    \n    <span class=\"hljs-comment\">-- DSM CLOCK process<\/span>\n    p_mclk: <span class=\"hljs-keyword\">process<\/span> <span class=\"hljs-keyword\">is<\/span>\n    <span class=\"hljs-keyword\">begin<\/span>\n        mclk &lt;= <span class=\"hljs-string\">'0'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> <span class=\"hljs-number\">0.4<\/span> * MCLK_LOW;\n        mclk &lt;= <span class=\"hljs-string\">'1'<\/span>;\n        <span class=\"hljs-keyword\">WAIT<\/span> <span class=\"hljs-keyword\">FOR<\/span> MCLK_HIGH;\n        mclk &lt;= <span class=\"hljs-string\">'0'<\/span>;\n        <span class=\"hljs-keyword\">wait<\/span> <span class=\"hljs-keyword\">for<\/span> <span class=\"hljs-number\">0.6<\/span> * MCLK_LOW;\n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> p_mclk;\n    \n    <span class=\"hljs-comment\">-- Test process<\/span>\n    p_test : <span class=\"hljs-keyword\">process<\/span> <span class=\"hljs-keyword\">is<\/span>\n    <span class=\"hljs-keyword\">begin<\/span> \n        \n        <span class=\"hljs-comment\">-- input \"1001\"<\/span>\n        input_1(DATA_IN);\n        input_0(DATA_IN);\n        input_0(DATA_IN);\n        input_1(DATA_IN);\n        \n<span class=\"hljs-comment\">--        -- input \"1000\"<\/span>\n<span class=\"hljs-comment\">--        input_1(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_0(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_0(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_0(DATA_IN);<\/span>\n        \n<span class=\"hljs-comment\">--        -- input \"1110\"<\/span>\n<span class=\"hljs-comment\">--        input_1(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_1(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_1(DATA_IN);<\/span>\n<span class=\"hljs-comment\">--        input_0(DATA_IN);<\/span>\n        \n        <span class=\"hljs-comment\">-- Add more input patterns<\/span>\n        \n    <span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">process<\/span> p_test;\n    \n<span class=\"hljs-keyword\">end<\/span> <span class=\"hljs-keyword\">architecture<\/span> rtl;\n<\/code><\/span><small class=\"shcb-language\" id=\"shcb-language-4\"><span class=\"shcb-language__label\">Code language:<\/span> <span class=\"shcb-language__name\">VHDL<\/span> <span class=\"shcb-language__paren\">(<\/span><span class=\"shcb-language__slug\">vhdl<\/span><span class=\"shcb-language__paren\">)<\/span><\/small><\/pre><\/div><\/div><\/div>\n<\/div><\/div><\/div>\n\n\n\n<p>In this testbench, we chose a decimation rate of \\(M = 8 \\). The output word size is then 9 bits, and the maximum output range is \\(2^9-1 = 511\\). We can select different input patterns, and the sinc<sup>3<\/sup> filter output will be proportional to the number of &#8216;1&#8217;s in the bit stream.<\/p>\n\n\n\n<p><strong>Input pattern = &#8220;1001&#8221; (50% 1s), output = 256<\/strong><\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"1688\" height=\"182\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1001.png\" alt=\"\" class=\"wp-image-6420\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1001.png 1688w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1001-300x32.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1001-1024x110.png 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1001-768x83.png 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1001-1536x166.png 1536w\" sizes=\"auto, (max-width: 1688px) 100vw, 1688px\" \/><figcaption class=\"wp-element-caption\">Synchronous decoder<\/figcaption><\/figure>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"1690\" height=\"230\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1001.png\" alt=\"\" class=\"wp-image-6421\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1001.png 1690w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1001-300x41.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1001-1024x139.png 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1001-768x105.png 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1001-1536x209.png 1536w\" sizes=\"auto, (max-width: 1690px) 100vw, 1690px\" \/><figcaption class=\"wp-element-caption\">Manchester decoder<\/figcaption><\/figure>\n\n\n\n<p><strong>Input pattern = &#8220;1000&#8221; (25% 1s), output = 128<\/strong><\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"1688\" height=\"182\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1000.png\" alt=\"\" class=\"wp-image-6422\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1000.png 1688w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1000-300x32.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1000-1024x110.png 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1000-768x83.png 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/SD_sim_1000-1536x166.png 1536w\" sizes=\"auto, (max-width: 1688px) 100vw, 1688px\" \/><figcaption class=\"wp-element-caption\">Synchronous decoder<\/figcaption><\/figure>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"1691\" height=\"230\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1000.png\" alt=\"\" class=\"wp-image-6424\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1000.png 1691w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1000-300x41.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1000-1024x139.png 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1000-768x104.png 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/MD_sim_1000-1536x209.png 1536w\" sizes=\"auto, (max-width: 1691px) 100vw, 1691px\" \/><figcaption class=\"wp-element-caption\">Manchester decoder<\/figcaption><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-deployment-on-the-b-board-pro\"><span class=\"ez-toc-section\" id=\"Deployment-on-the-B-Board-PRO\"><\/span>Deployment on the B-Board PRO<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>This Vivado project shows how to add the synchronous decoder and\/or Manchester decoder block to the B-Board firmware and send output data to the CPU through <code>ix_axis_interface<\/code>. This project starts from the template introduced in <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-fpga-control-development\">Getting started with FPGA control development<\/a>, and the following blocks are added to the project.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><code>clk_10m<\/code> is the 10MHz clock source for the AMC1035 and its output is connected to the physical pin\u00a0<code>USR[0]<\/code><\/li>\n\n\n\n<li><code>clk_80m<\/code> is the 80MHz clock for Manchester decoding<\/li>\n\n\n\n<li><code>amc_driver_0<\/code> and <code>amc_driver_md_0 <\/code>are the synchronous decoder and Manchester decoder blocks, their input DATA_IN is connected to the physical pin<code> USR[1]<\/code><\/li>\n\n\n\n<li>Two AXI4-Stream FIFOs are used to deal with the asynchronous data transfer between different clock fields, their outputs are sent to the CPU through <code>FPGA2CPU_00<\/code> and <code>FPGA2CPU_01<\/code><\/li>\n\n\n\n<li>The decimation ratio M is sent to the FPGA through <code>SBO_reg_32<\/code><\/li>\n\n\n\n<li><code>proc_sys_reset_10mhz<\/code> and <code>proc_sys_reset_80mhz<\/code> provide active low resets for the 10MHz and 80MHz clock fields, their <code>ext_reset_n<\/code> input is connected to <code>nReset_sync<\/code> port of <code>ix_axis_interface<\/code><\/li>\n<\/ul>\n\n\n\n<figure class=\"wp-block-image size-full is-resized\"><img loading=\"lazy\" decoding=\"async\" width=\"1790\" height=\"1156\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_vivado_project.png\" alt=\"\" class=\"wp-image-6432\" style=\"width:785px;height:508px\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_vivado_project.png 1790w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_vivado_project-300x194.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_vivado_project-1024x661.png 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_vivado_project-768x496.png 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_vivado_project-1536x992.png 1536w\" sizes=\"auto, (max-width: 1790px) 100vw, 1790px\" \/><\/figure>\n\n\n\n<div class=\"wp-block-simple-alerts-for-gutenberg-alert-boxes sab-alert sab-alert-info\" role=\"alert\">This project has both implementations integrated. In a real application, users can choose one approach or the other, according to their needs.<\/div>\n\n\n\n<p>Before synthesizing the project, Vivado will report timing failure at <code>reg_M<\/code> because the asynchronous data transfer (due to the 250MHz FPGA main clock and the 10MHz\/80MHz decoder clock) may lead to a metastable state. However, since we know that, in reality, there will be enough time to wait for a new stable state, this issue can be safely ignored by setting a longer maximum delay. In order to do this, a new constraint file must be added to the Vivado project following the instructions in <a href=\"https:\/\/imperix.com\/doc\/help\/getting-started-with-fpga-control-development\">Getting started with FPGA control development<\/a>. The constraints below shall be sufficient to circumvent this issue.<\/p>\n\n\n<pre class=\"wp-block-code\"><span><code class=\"hljs\">set_max_delay -from &#091;get_pins {top_i\/reg_M\/U0\/i_synth\/i_bb_inst\/gen_output_regs.output_regs\/i_no_async_controls.output_reg&#091;*]\/C}] -to &#091;get_pins {top_i\/amc_driver_0\/U0\/P_CNR.CNR_cnt_reg&#091;*]\/R}] 4.0\nset_max_delay -from &#091;get_pins {top_i\/reg_M\/U0\/i_synth\/i_bb_inst\/gen_output_regs.output_regs\/i_no_async_controls.output_reg&#091;*]\/C}] -to &#091;get_pins top_i\/amc_driver_0\/U0\/CNR_reg\/D] 4.0\n\nset_max_delay -from &#091;get_pins {top_i\/reg_M\/U0\/i_synth\/i_bb_inst\/gen_output_regs.output_regs\/i_no_async_controls.output_reg&#091;*]\/C}] -to &#091;get_pins {top_i\/amc_driver_md_0\/U0\/CNR_cnt_reg&#091;*]\/D}] 4.0\nset_max_delay -from &#091;get_pins {top_i\/reg_M\/U0\/i_synth\/i_bb_inst\/gen_output_regs.output_regs\/i_no_async_controls.output_reg&#091;*]\/C}] -to &#091;get_pins top_i\/amc_driver_md_0\/U0\/CNR_rising_edge_reg\/D] 4.0<\/code><\/span><\/pre>\n\n\n<p>On the CPU side, a Simulink file is provided, which reads the sinc3 filter output and converts the uint32 data to Volts. As introduced in its <a href=\"https:\/\/www.ti.com\/lit\/ug\/sbau320\/sbau320.pdf?HQS=dis-mous-null-mousermode-dsf-pf-null-wwe&amp;DCM=yes&amp;ref_url=https%3A%2F%2Fwww.mouser.ch%2F&amp;distId=26\">datasheet<\/a>, the full-scale input range of AMC1035 is +\/-1.25 V, then the sinc<sup>3<\/sup> filter with decimation ratio \\(M \\) converts the input to \\(1+3\\log_{2}{M} \\) bits. Based on this, data can be recovered using the program below.<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"365\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_codegen-2-1024x365.png\" alt=\"Simulink implementation that retrieves data from the delta-sigma modulator.\" class=\"wp-image-6575\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_codegen-2-1024x365.png 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_codegen-2-300x107.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_codegen-2-768x274.png 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/AMC_codegen-2.png 1405w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" \/><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\" id=\"h-experimental-results\"><span class=\"ez-toc-section\" id=\"Experimental-results\"><\/span>Experimental results<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The following hardware was used:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>B-Board evaluation kit<\/li>\n\n\n\n<li>AMC1035 evaluation module<\/li>\n\n\n\n<li>Function generator<\/li>\n<\/ul>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"2560\" height=\"1920\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/amc_build_up-scaled.jpg\" alt=\"Picture of the implementated test bench for the delta-sigma modulator\" class=\"wp-image-6526\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/amc_build_up-scaled.jpg 2560w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/amc_build_up-300x225.jpg 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/amc_build_up-1024x768.jpg 1024w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/amc_build_up-768x576.jpg 768w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/amc_build_up-1536x1152.jpg 1536w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/amc_build_up-2048x1536.jpg 2048w\" sizes=\"auto, (max-width: 2560px) 100vw, 2560px\" \/><\/figure>\n\n\n\n<p>A 50Hz 2V (p-p voltage) sine wave is connected to ADC 0 of the B-Board and the input port of the AMC1035, and the results are plotted in BB Control. The three signals overlap properly, showing that the synchronous decoder and Manchester decoder blocks for the delta-sigma modulator both work properly.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"920\" height=\"764\" src=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/test_result.png\" alt=\"Measurement results proving the proper operation of the interface for the delta-sigma modulator.\" class=\"wp-image-6527\" srcset=\"https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/test_result.png 920w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/test_result-300x249.png 300w, https:\/\/imperix.com\/doc\/wp-content\/uploads\/2021\/08\/test_result-768x638.png 768w\" sizes=\"auto, (max-width: 920px) 100vw, 920px\" \/><\/figure>\n\n\n\n<p><\/p>\n","protected":false},"excerpt":{"rendered":"<p>This technical note shows how to build a decoder IP for a Delta-Sigma Modulator and establish communication with such a device through USR ports of&#8230;<\/p>\n","protected":false},"author":10,"featured_media":31946,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_kad_post_transparent":"","_kad_post_title":"","_kad_post_layout":"","_kad_post_sidebar_id":"","_kad_post_content_style":"","_kad_post_vertical_padding":"","_kad_post_feature":"","_kad_post_feature_position":"","_kad_post_header":false,"_kad_post_footer":false,"_kad_post_classname":"","footnotes":""},"categories":[4],"tags":[17],"software-environments":[106,103],"provided-results":[108,107],"related-products":[50,31,32,92,166,51,110],"guidedreadings":[],"tutorials":[],"user-manuals":[],"coauthors":[72],"class_list":["post-6242","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-implementation","tag-fpga-programming","software-environments-fpga","software-environments-matlab","provided-results-experimental","provided-results-simulation","related-products-acg-sdk","related-products-b-board-pro","related-products-b-box-rcp","related-products-b-box-micro","related-products-b-box-rcp-3-0","related-products-cpp-sdk","related-products-tpi"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.3 - 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