SV-PWM – Space vector PWM
The SV-PWM block generates PWM signals based on the Space Vector Modulation (SVM) algorithm. This algorithm determines the three vectors that are the closest to…
The SV-PWM block generates PWM signals based on the Space Vector Modulation (SVM) algorithm. This algorithm determines the three vectors that are the closest to…
The FPGA sandbox PWM block allows driving the PWM output from a user-made modulator from within the FPGA. Information on FPGA edition is available on Editing…
The Direct output PWM block sets PWM output(s) directly to ‘0’ or ‘1’. This technique is typically used for Model Predictive Control (TN162) or Direct…
The Carrier-based PWM block generates PWM signals based on one of the 4 carrier shape illustrated below: triangle, sawtooth, inverted triangle, inverted sawtooth. When using…
The Pulse Width Modulators (PWM) share the dead-time generation and the activate/deactivate features, configured through the output mode, deadtime, and activate parameters. The said PWM…
The FLT block configures and reads the digital fault inputs. The fault input pin signals are tied to the fault manager and, using the FLT…
The angle decoder (DEC) block decodes quadrature-encoded signals produced by incremental encoders for motor drive applications. The imperix controllers provide decoder inputs for quadrature-encoder speed/position…
The GPO block, or its equivalent C++ routines, is responsible for asserting the specific logic states of the General Purpose Outputs (GPO) pins. This interface…
The GPI block (or its C++ routines) is responsible for reading the the logic states of the General Purpose Inputs (GPI) pins. This function allows…
The DAC block, or its equivalent C++ routines, is used to apply a given value to one of the Digital-to-Analog Converter (DAC) channels of the…
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