ADC – Analog data acquisition
The ADC block (or C++ routines) are used to access data from a given Analog-to-Digital Converter (ADC) channel. They also serve to configure how this…
The ADC block (or C++ routines) are used to access data from a given Analog-to-Digital Converter (ADC) channel. They also serve to configure how this…
Imperix controllers feature 4 clock generators, CLK0, CLK1, CLK2 and CLK3, running at 250 MHz. They provide time bases for FPGA resources such as the…
The CONFIG block primarily serves to configure the main clock (CLK0) as well as its derivatives. Together, these clocks define the frequency and phase of…
This note covers the rotor field-oriented control of an induction machine and its implementation on a user-configurable voltage-source inverter.
This technical note presents an FPGA-based Direct Torque Control (DTC) of a PMSM motor using Vivado HLS, coupled with the possibility to customize the FPGA…
This technical note shows how an SPI communication link can be established between an FPGA and an external Analog-to-Digital Converter (ADC). The development setup will…
This technical note shows how the implementation of an FPGA-based hysteresis controller can be conducted, starting from the modeling stage, following with automated VHDL code…
This technical note provides an example of how a fast hysteresis current controller can be implemented, leveraging the possibility of editing the FPGA firmware for…
This technical note presents various techniques for the DC bus balancing of NPC converters. These techniques are notably used in TN135, which implements a grid-tied…
This technical note addresses the sensorless control of motor drives using a back-EMF sliding-mode observer. The technique allows speed and position estimation of a Permanent…
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