FPGA-based SPI communication IP for ADC
This technical note shows how an SPI communication link can be established between an FPGA and an external Analog-to-Digital Converter (ADC). The development setup will…
This technical note shows how an SPI communication link can be established between an FPGA and an external Analog-to-Digital Converter (ADC). The development setup will…
This technical note shows how the implementation of an FPGA-based hysteresis controller can be conducted, starting from the modeling stage, following with automated VHDL code…
This technical note provides an example of how a fast hysteresis current controller can be implemented, leveraging the possibility of editing the FPGA firmware for…
This note focuses on the multi-master feature which allows executing control codes on multiple imperix power converter controllers interconnected using optical fiber (SFP). The imperix in-house…
The BB Control Timing info tab provides a graphical representation of the various computation and communication delays involved in the B-Board PRO and B-Box RCP…
In a standard configuration, the control algorithm is executed just after each sampling event. The oversampling feature enables the possibility to set up multiple sampling…
This note presents a possible approach to apply pre-recorded profiles as setpoints for a control algorithm developed on Simulink with ACG SDK. It assumes the…
This product note explains how to compute the discrete control delay of a control algorithm running on an imperix controller. Context The execution of a…
This note covers the configuration and implementation of variable frequency operation with imperix controllers (B-Box RCP and B-BoardPRO). Changing the modulation frequency during the control…
This page presents a dead time selection method that can be used with imperix power modules. Appropriate dead time selection is crucial to guarantee the…
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