How to build a 3 phase inverter
PN170This page is a quick-start guide to build a 3 phase inverter using imperix equipment. It is specifically made to accompany users who want to…
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Installing the Xilinx Blockset for Simulink
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The Xilinx blockset for MATLAB & Simulink is a single toolbox that unifies Model Composer (HLS), System Generator for DSP (HDL) as well as the Xilinx AI…
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FPGA development on imperix controllers
Usually, the user programs the imperix controller’s CPU using imperix ACG SDK or C++ SDK, and uses the pre-implemented FPGA peripherals such as the ADC…
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Getting started with FPGA programming
Imperix’s standard workflow programs the CPU of programmable controllers from Simulink, PLECS, or the Imperix IDE using the ACG SDK or CPP SDK. This proves…
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Introduction to HDL Coder
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HDL Coder is a MATLAB add-on that can generate VHDL and Verilog code from MATLAB functions or Simulink models. This approach can greatly accelerate rapid…
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Xilinx Vitis HLS introduction
Xilinx Vitis HLS (formerly Xilinx Vivado HLS) is a High-Level Synthesis (HLS) tool developed by Xilinx and available at no cost. Vitis HLS allows the…
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Xilinx System Generator introduction
Xilinx System Generator for DSP (SysGen) is a MATLAB Simulink add-on that enables the development of architecture-level FPGA designs using graphical blocks programming. Users can…
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Xilinx Model Composer introduction
Model Composer is a Simulink add-on software developed by Xilinx. It is a high-level synthesis (HLS) tool that allows the user to program an FPGA-based…
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Multi-master feature for distributed networked control systems
This note focuses on the multi-master feature which allows executing control codes on multiple imperix power converter controllers interconnected using optical fiber (SFP). The imperix in-house…
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Timing info tab in BB Control
The BB Control Timing info tab provides a graphical representation of the various computation and communication delays involved in the B-Board PRO and B-Box RCP…
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