External reset
SD025The external reset block provides a signal that can be wired to the external reset input of PID controllers to keep the integrator at reset…
SD025
SD025Core state
SD026The Core state block returns the state of the target: 0 = FAULT: The target received an error signal and waits for a user acknowledgment…
Probe variable
SD027The probe variable block creates a variable that can be watched and logged in real-time using using imperix Cockpit. It supports the int32, uint32, and…
Tunable parameter
SD028The tunable parameter block creates a variable that can be altered in real-time using imperix Cockpit. It supports the int32, uint32, and float data types. Simultaneously, the tunable parameter…
Getting started with FPGA control development
PN159This note explains how to get started with the implementation of power converter control algorithms in the FPGA of imperix power electronic controllers. The benefit…
Xilinx Model Composer introduction
PN163Model Composer is a Simulink add-on software developed by Xilinx. It is a high-level synthesis (HLS) tool that allows the user to program an FPGA-based…
Xilinx System Generator introduction
PN161Xilinx System Generator for DSP (SysGen) is a MATLAB Simulink add-on that enables the development of architecture-level FPGA designs using graphical blocks programming. Users can…
Xilinx Vitis HLS introduction
PN164Xilinx Vitis HLS (formerly Xilinx Vivado HLS) is a High-Level Synthesis (HLS) tool developed by Xilinx and available at no cost. Vitis HLS allows the…
Installing the Xilinx Blockset for Simulink
PN166The Xilinx blockset for MATLAB & Simulink is a single toolbox that unifies Model Composer (HLS), System Generator for DSP (HDL) as well as the Xilinx AI…
Custom PWM modulator implementation in FPGA
TN141To implement power converter control algorithms in an FPGA, it is often required to develop an FPGA-based pulse-width modulation (PWM) module. Therefore, this note presents…
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