FLT – Fault inputs
SD008At the hardware level, FLT inputs are special-purpose digital inputs that can be configured to generate a “hardware fault” in order to instantly disable all PWM outputs…
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DEC – Angle decoder input
Imperix controllers provide angle decoder (DEC) resources to decode quadrature-encoded signals produced by incremental encoders, which are widely used in motor drive applications. At the…
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GPO – General purpose outputs
At the hardware level, GPO outputs are general-purpose digital outputs that can be configured for various purposes. This block and the associated C/C++ routines provide means to…
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GPI – General purpose inputs
At the hardware level, GPI inputs are general-purpose digital inputs that can be configured for various purposes. This block and the associated C/C++ routines provide means to…
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DAC – Analog outputs
The DAC block, or its equivalent C++ routines, is used to apply a given value to one of the Digital-to-Analog Converter (DAC) channels of the…
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ADC – Analog data acquisition
The ADC block (or C++ routines) is used to access data from a given Analog-to-Digital Converter (ADC) channel. It also configures how this data is…
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CLK – Clock generators
Imperix controllers feature 4 clock generators, CLK0, CLK1, CLK2, and CLK3, which can be freely configured as derivatives of the 250 MHz base clock. These…
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FPGA-based Direct Torque Control using Vivado HLS
This technical note presents an FPGA-based Direct Torque Control (DTC) of a PMSM motor using Vivado HLS, coupled with the possibility to customize the FPGA…
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FPGA-based SPI communication IP for ADC
This technical note shows how an SPI communication link can be established between an FPGA and an external Analog-to-Digital Converter (ADC). The development setup will…
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FPGA-based hysteresis controller for three-phase inverter using HDL Coder
This technical note shows how the implementation of an FPGA-based hysteresis controller can be conducted, starting from the modeling stage, following with automated VHDL code…
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