TPI – Programmable inverter

The TPI block is a simulation model included in the Imperix Power library. It models the imperix programmable inverter TPI8032 in Simulink and PLECS simulation.

For more information regarding the Imperix Power library, please read Getting started with Imperix Power library.

Modeling of TPI

The schematic of the TPI model is depicted below. It has three modeling levels:

• (A) Simple
• (B) Detailed
• (C) Detailed common mode

Due to space limitations, the detailed structure of TPI is not introduced on this page. Please read the TPI8032 datasheet for more information.

For more detailed model parameters and measurement results, please contact [email protected].

DC bus + DC EMC filter

The schematic of the equivalent DC bus is shown below.

The simulation model is relevant within a given frequency range. The frequency validity range is 0-4 kHz for the (A) Simple level and 0-100 kHz for the (B) Detailed level. In that range, the impedance and transfer function of the model are reasonably close to the modeled system, which can be seen along with the plots of the proposed models. The model parameters are also displayed below.

	(A)	(B), (C)
C_1 [μF]	1340*2	1340*2
ESR_1 [mΩ]	0	34/2

The main role of the DC EMC filter is to limit the transmission of the input common-mode current from the DC side to the AC output. However on the DC side, in practice, the common-mode characteristics mostly lie in the high-frequency range. Therefore, only the differential mode is considered when building the DC EMC filter model.

The combination of the DC EMC filter and the DC bus forms an LC circuit. Within the frequency validity range, the impedance and transfer function of the simulation model are reasonably close to the modeled system. The comparison and parameters are displayed below.

	(A)	(B), (C)
C1 [μF]	0	2.35
R1 [mΩ]	0	40
L1 [μH]	18.8	18.8
Rs [mΩ]	60	60

Main inductors + AC EMC filter

On the AC side, TPI8032 has three main inductors at the converter’s AC output. An AC EMC filter limits the transmission of the input common-mode current from the DC side to the AC output (and vice-versa).

As introduced in TN166, the common mode feedback path between the AC EMC filter and DC midpoint leads to a minimum DC voltage of \(2V_{phase, peak}\) in grid-tied operations. Besides, since the reference point of AC voltage is connected to a fixed potential, zero-sequence distortions may present in the measured AC voltages when injecting harmonics, for instance when using Space Vector Modulation (SVM). To simulate the abovementioned behavior, the (C) Detailed common mode level has to be selected, which includes the common mode model of the AC EMC filter and the feedback path.

The main inductors are modeled by the inductance \(L_m\) and equivalent series resistance (ESR) \(R_m\), which is the same for all the modeling levels. The impedance of the main inductors versus measured results is shown below.

Lm [μH]	1050
Rm [mΩ]	54

The schematic of the AC EMC filter model is shown below.

A common mode inductor can be modeled by its mutual inductance \( M \) and leakage inductance \(L_{leak}\). In the differential mode, only the leakage inductance \(L_{leak}\) takes effect. The choice of mutual inductance \( M \) will be addressed in the next section.

In the differential mode, the combination of the AC EMC filter and the main inductors forms an LC circuit between phases. Within the frequency validity range, the impedance and transfer function of the simulation model are reasonably close to the modeled system. The comparison and parameters are displayed below.

Req [Ω]	3.75
Ceq [μF]	13.12
R1 [Ω]	10
C1 [μF]	8.2
C2 [μF]	4.7
C3 [μF]	0.22
Cf [μF]	1.5
Lleak1[μH]	13.6
Lleak2[μH]	2.56

Common mode modeling

The common mode inductance \(M_1\) is formed by two identical common mode inductors. As the measurement shows, the value of one common mode inductor varies from 9.5mH to 2.4mH as the frequency increases from 10kHz to 200kHz. It’s hard to accurately model such a varied component. To simplify the model, the value of 5.5mH at TPI’s 50kHz nominal operating frequency is finally used in the simulation model. Note that \(M_1\) has to be doubled since it consists of two inductors.

The value of \(M_2\) is simply taken from the datasheet as its value is insignificant compared to \(M_1\) and other components.

M1 [mH]	11
M2 [mH]	0.8

Embedded sensors

A generic sensor can be approximately modeled by an ideal sensor in series with an optional first-order Low-Pass Filter (LPF). The relationship between sensor’s bandwidth \(f_{BW}\) and the time constant \(\tau\) of the LPF follows \(\tau = \frac{1}{2\pi f_{BW}}\).

A sensor is modeled as a first-order LPF only if its bandwidth lies within the frequency range of a given modeling level. Otherwise, it is modeled as an ideal sensor. The following table summarizes the information on all the sensors in the TPI.

Power transistors

The TPI block offers two options for modeling the power transistors:

• Switched The transistors are modeled by individual power semiconductors. The control inputs are instantaneous logical gate signals.
• Averaged The transistors are modeled by controlled voltage and current sources. The control inputs are the relative on-times of the semiconductors with values between 0 and 1. The gate signals can be either instantaneous (using only values 0 and 1) or time-averaged.

Although the functionality is practically the same, these options are named differently in PLECS and Simulink Simscape to be consistent with their naming conventions.

Simulink TPI block

Port specification

• The input g is the gate signal. It has a width of 6, representing the signals for the high and low gates of three phases.
  • For Switching devices (switched) model, g is the 0/1 PWM signal.
  • For Switching Function (averaged) model, g can be either the 0/1 PWM signal or the duty cycle between 0 and 1.
• The output Vdc is the measured voltage across the DC bus.
• The output Im is the measured power module currents.
• The output V is the measured three-phase AC voltages.
• The output I is the measured three-phase AC currents.
• The connection port DC+ is the electrical port connected to the positive input of the DC Filter.
• The connection port DC- is the electrical port connected to the negative input of the DC Filter.
• The connection ports A,B,C are the electrical ports connected to the three-phase AC output.
• The connection port O is the electrical port connected to the star point of the three-phase AC output.

Parameters

• Use global configurations is ticked when the block receives global configurations from the Config block.
• Modeling level selects the modeling level of the peripheral circuits.
• Transistor model type selects the model of the power transistors.
• Initial DC bus voltage [V] defines the initial voltage across the DC bus when the simulation starts.

PLECS TPI block

Port specification

• The input g is the gate signal. It has a width of 6, representing the signals for the high and low gates of three phases.
  • For Switched model, g is the 0/1 PWM signal.
  • For Sub-cycle average model, g can be either the 0/1 PWM signal or the duty cycle between 0 and 1.
• The output Vdc is the measured voltage across the DC bus.
• The output Im is the measured power module currents.
• The output V is the measured three-phase AC voltages.
• The output I is the measured three-phase AC currents.
• The connection port DC+ is the electrical port connected to the positive input of the DC Filter.
• The connection port DC- is the electrical port connected to the negative input of the DC Filter.
• The connection ports A,B,C are the electrical ports connected to the three-phase AC output.
• The connection port O is the electrical port connected to the star point of the three-phase AC output.

Parameters

• Modeling level selects the modeling level of the peripheral circuits.
• Transistor model type selects the model of the power transistors.
• Terminal O visible shows or hides the port O.
• Initial DC bus voltage [V] defines the initial voltage across the DC bus when the simulation starts.

Probe signals

The following signals can be monitored by a Probe block in PLECS.

• Gate signals monitors the gate signals present at the input g.
• DC Bus voltage true value [V] monitors the true value of the DC bus voltage in Volt.
• DC Bus voltage sensor output [V] monitors the physical output of the DC bus voltage sensor in Volt.
• Module currents true value [A] monitors the true value of the power module currents in Amp.
• Module currents sensor output [V] monitors the physical output of the module current sensors in Volt.
• AC side voltages true value [V] monitors the true value of the AC voltages in Volt.
• AC side voltages sensor output [V] monitors the physical output of the AC voltage sensors in Volt.
• AC side currents true value [A] monitors the true value of the AC currents in Amp.
• AC side currents sensor output [V] monitors the physical output of the AC current sensors in Volt.