Core state
The Core state block returns the state of the target: The block also provides a second signal called “reset” that can be wired to the…
These notes provide documentation for all the blocks and functions packed with ACG SDK and CPP SDK. Each page covers the configuration parameters and the use of a specific peripheral block within the Simulink, PLECS, and C++ environments.
The Core state block returns the state of the target: The block also provides a second signal called “reset” that can be wired to the…
The external reset block provides a signal that can be wired to the external reset input of PID controllers to keep the integrator at reset…
This block issues a request to enable or disable the PWM outputs, similar to the “Enable outputs” button of BB Control utility software. It issues…
The Sandbox Output towards FPGA (SBO) block writes the value of the SBO registers in the FPGA. It is used to transfer data from the…
The Sandbox Input from FPGA (SBI) block reads the value of the SBI registers in the FPGA. It is used to transfer data from user-made…
The CAN output mailbox block allows sending CAN messages with up to 8 bytes long payloads. To receive messages with payloads of up to 8…
The CAN input mailbox block allows receiving CAN messages with up to 8 bytes long payloads. To send messages with payloads of up to 8…
The Ethernet output mailbox block allows sending up to 1024 bytes of data via Ethernet using the UDP/IP protocol (in SDK versions prior to 2025.2,…
The Ethernet input mailbox block allows receiving up to 1024 bytes of data via Ethernet using the UDP protocol (in SDK versions prior to 2025.2,…
The SV-PWM block generates PWM signals based on the Space Vector Modulation (SVM) algorithm. This algorithm determines the three vectors that are the closest to…
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