SBO – Sandbox output towards FPGA
The Sandbox Output towards FPGA (SBO) block writes the value of the SBO registers in the FPGA. It is used to transfer data from the…
The Sandbox Output towards FPGA (SBO) block writes the value of the SBO registers in the FPGA. It is used to transfer data from the…
This block issues a request to enable or disable the PWM outputs, similar to the āEnable outputsā button of BB Control utility software. It issues…
The external reset block provides a signal that can be wired to the external reset input of PID controllers to keep the integrator at reset…
The Core state block returns the state of the target: 0 = FAULT: The target received an error signal and waits for a user acknowledgment…
The probe variable block creates a variable that can be watched and logged in real-time using using imperix Cockpit. It supports the int32, uint32, and…
The tunable parameter block creates a variable that can be altered in real-time using imperix Cockpit. It supports the int32, uint32, and float data types. Simultaneously, the tunable parameter…
Neutral Point Clamped NPC converters are a family of multilevel power converters that are characterized by the use of clamping diodes for guaranteeing the proper voltage sharing across the power switches.
Xilinx Vitis HLS (formerly Xilinx Vivado HLS) is a High-Level Synthesis (HLS) tool developed by Xilinx and available at no cost. Vitis HLS allows the…
The Xilinx blockset for MATLAB & Simulink is a single toolbox that unifies Model Composer (HLS), System Generator for DSP (HDL) as well as the Xilinx AI…
The “abc to dq0” block computes the coordinates of a three-phase (abc) signal in a rotating reference frame (dq0). The angle of the rotating reference…
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