This page summarizes the documentation pages relating to FPGA development on imperix controllers.
Starting an FPGA development project
Imperix offers the possibility to customize that FPGA firmware by instantiating the imperix firmware IP in Xilinx Vivado and editing programmable logic around it.
The first step to start editing the FPGA consists of installing Xilinx Vivado Design Suite which is available for free as the ML Standard (or WebPACK) edition.
The user should familiarise himself with the imperix firmware IP for Xilinx Vivado. It contains the logic operating the FPGA-part of B-Box or B-Board. The IP also provides user interfaces to exchange data with the CPU, retrieve analog inputs conversion results, drive the PWM outputs, and more.
The user can then create the FPGA development template by following the instruction of the product note below. This product note also explains how the template facilitates retrieval of the sampled analog inputs conversion results and data exchange with the CPU by using the AXI4-Stream protocol. Finally, it provides a “hello-world” example explaining step-by-step how to add custom logic, synthesize the design and load it into the FPGA.
Some additional general FPGA development knowledge is available on the following pages.
Learning about FPGA design tools
Traditionally, FPGA designs are implemented using HDL languages such as VHDL or Verilog. However, the user can use automated code generation tools that allow designing FPGA modules without the need to know any HDL language.
These tools can be separated into two main categories:
- HDL-level tools such as System Generator and HDL Coder, in which the user can describe its design down to the flip-flop register. These tools are much more closer to HDL langages such as VHDL or Verilog
- High-Level Synthesis (HLS) tools such as Model Composer and Vitis HLS which are particularly adapted to describe control algorithms using complex data types and math functions.
To implement peripherals using HDL code generation tools:
- PN161: Xilinx System Generator introduction
- PN162: MATLAB HDL Coder introduction
- TN141: Custom FPGA PWM modulator implementation
To implement control algorithms using HLS tools:
- PN163: Xilinx Model Composer introduction
- PN164: Xilinx Vitis HLS introduction
- TN142: High-Level Synthesis for FPGA developments